Commit ab39e2a8 authored by Ashutosh Dixit's avatar Ashutosh Dixit
Browse files

drm/xe/oa/uapi: Expose MERT OA unit 



A MERT OA unit is available in the SoC on some platforms. Add support
for this OA unit and expose it to userspace. The MERT OA unit does not
have any HW engines attached, but is otherwise similar to an OAM unit.

Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarUmesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: default avatarAshutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patch.msgid.link/20251205212613.826224-2-ashutosh.dixit@intel.com
parent 2b277b50

drivers/gpu/drm/xe/regs/xe_oa_regs.h

+9 −0
Original line number Diff line number Diff line
@@ -108,4 +108,13 @@ 
#define XE_OAM_SCMI_0_BASE_ADJ			(MEDIA_GT_GSI_OFFSET + XE_OAM_SCMI_0_BASE)

#define XE_OAM_SCMI_1_BASE_ADJ			(MEDIA_GT_GSI_OFFSET + XE_OAM_SCMI_1_BASE)



#define OAMERT_CONTROL				XE_REG(0x1453a0)

#define OAMERT_DEBUG				XE_REG(0x1453a4)

#define OAMERT_STATUS				XE_REG(0x1453a8)

#define OAMERT_HEAD_POINTER			XE_REG(0x1453ac)

#define OAMERT_TAIL_POINTER			XE_REG(0x1453b0)

#define OAMERT_BUFFER				XE_REG(0x1453b4)

#define OAMERT_CONTEXT_CONTROL			XE_REG(0x1453c8)

#define OAMERT_MMIO_TRG				XE_REG(0x1453cc)



#endif

drivers/gpu/drm/xe/xe_oa.c

+34 −3
Original line number Diff line number Diff line
@@ -1940,6 +1940,7 @@ static bool oa_unit_supports_oa_format(struct xe_oa_open_param *param, int type) 
			type == DRM_XE_OA_FMT_TYPE_OAC || type == DRM_XE_OA_FMT_TYPE_PEC;

	case DRM_XE_OA_UNIT_TYPE_OAM:

	case DRM_XE_OA_UNIT_TYPE_OAM_SAG:

	case DRM_XE_OA_UNIT_TYPE_MERT:

		return type == DRM_XE_OA_FMT_TYPE_OAM || type == DRM_XE_OA_FMT_TYPE_OAM_MPEC;

	default:

		return false;
@@ -2227,6 +2228,8 @@ static const struct xe_mmio_range xe2_oa_mux_regs[] = { 
	{ .start = 0xE18C, .end = 0xE18C },	/* SAMPLER_MODE */

	{ .start = 0xE590, .end = 0xE590 },	/* TDL_LSC_LAT_MEASURE_TDL_GFX */

	{ .start = 0x13000, .end = 0x137FC },	/* PES_0_PESL0 - PES_63_UPPER_PESL3 */

	{ .start = 0x145194, .end = 0x145194 },	/* SYS_MEM_LAT_MEASURE */

	{ .start = 0x145340, .end = 0x14537C },	/* MERTSS_PES_0 - MERTSS_PES_7 */

	{},

};
@@ -2518,7 +2521,12 @@ int xe_oa_register(struct xe_device *xe) 
static u32 num_oa_units_per_gt(struct xe_gt *gt)

{

	if (xe_gt_is_main_type(gt) || GRAPHICS_VER(gt_to_xe(gt)) < 20)

		return 1;

		/*

		 * Mert OA unit belongs to the SoC, not a gt, so should be accessed using

		 * xe_root_tile_mmio(). However, for all known platforms this is the same as

		 * accessing via xe_root_mmio_gt()->mmio.

		 */

		return xe_device_has_mert(gt_to_xe(gt)) ? 2 : 1;

	else if (!IS_DGFX(gt_to_xe(gt)))

		return XE_OAM_UNIT_SCMI_0 + 1; /* SAG + SCMI_0 */

	else
@@ -2602,6 +2610,22 @@ static struct xe_oa_regs __oag_regs(void) 
	};

}



static struct xe_oa_regs __oamert_regs(void)

{

	return (struct xe_oa_regs) {

		.base		= 0,

		.oa_head_ptr	= OAMERT_HEAD_POINTER,

		.oa_tail_ptr	= OAMERT_TAIL_POINTER,

		.oa_buffer	= OAMERT_BUFFER,

		.oa_ctx_ctrl	= OAMERT_CONTEXT_CONTROL,

		.oa_ctrl	= OAMERT_CONTROL,

		.oa_debug	= OAMERT_DEBUG,

		.oa_status	= OAMERT_STATUS,

		.oa_mmio_trg	= OAMERT_MMIO_TRG,

		.oa_ctrl_counter_select_mask = OAM_CONTROL_COUNTER_SEL_MASK,

	};

}



static void __xe_oa_init_oa_units(struct xe_gt *gt)

{

	const u32 oam_base_addr[] = {
@@ -2615,8 +2639,15 @@ static void __xe_oa_init_oa_units(struct xe_gt *gt) 
		struct xe_oa_unit *u = &gt->oa.oa_unit[i];



		if (xe_gt_is_main_type(gt)) {

			if (!i) {

				u->regs = __oag_regs();

				u->type = DRM_XE_OA_UNIT_TYPE_OAG;

			} else {

				xe_gt_assert(gt, xe_device_has_mert(gt_to_xe(gt)));

				xe_gt_assert(gt, gt == xe_root_mmio_gt(gt_to_xe(gt)));

				u->regs = __oamert_regs();

				u->type = DRM_XE_OA_UNIT_TYPE_MERT;

			}

		} else {

			xe_gt_assert(gt, GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270);

			u->regs = __oam_regs(oam_base_addr[i]);

include/uapi/drm/xe_drm.h

+3 −0
Original line number Diff line number Diff line
@@ -1696,6 +1696,9 @@ enum drm_xe_oa_unit_type { 


	/** @DRM_XE_OA_UNIT_TYPE_OAM_SAG: OAM_SAG OA unit */

	DRM_XE_OA_UNIT_TYPE_OAM_SAG,



	/** @DRM_XE_OA_UNIT_TYPE_MERT: MERT OA unit */

	DRM_XE_OA_UNIT_TYPE_MERT,

};



/**