Loading arch/blackfin/Kconfig +13 −2 Original line number Diff line number Diff line Loading @@ -295,6 +295,12 @@ config PNAV10 help PNAV 1.0 board Support. config H8606_HVSISTEMAS bool "HV Sistemas H8606" depends on (BF532) help HV Sistemas H8606 board support. config GENERIC_BOARD bool "Custom" depends on (BF537 || BF536 \ Loading @@ -317,7 +323,8 @@ config MEM_MT48LC64M4A2FB_7E config MEM_MT48LC16M16A2TG_75 bool depends on (BFIN533_EZKIT || BFIN561_EZKIT \ || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM) || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM \ || H8606_HVSISTEMAS) default y config MEM_MT48LC32M8A2_75 Loading Loading @@ -366,7 +373,7 @@ config CLKIN_HZ int "Crystal Frequency in Hz" default "11059200" if BFIN533_STAMP default "27000000" if BFIN533_EZKIT default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT) default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS) default "30000000" if BFIN561_EZKIT default "24576000" if PNAV10 help Loading Loading @@ -404,6 +411,7 @@ config VCO_MULT default "20" if BFIN537_BLUETECHNIX_CM default "20" if BFIN561_BLUETECHNIX_CM default "20" if BFIN561_EZKIT default "16" if H8606_HVSISTEMAS help This controls the frequency of the on-chip PLL. This can be between 1 and 64. PLL Frequency = (Crystal Frequency) * (this setting) Loading Loading @@ -440,6 +448,7 @@ config SCLK_DIV default 4 if BFIN537_BLUETECHNIX_CM default 4 if BFIN561_BLUETECHNIX_CM default 5 if BFIN561_EZKIT default 3 if H8606_HVSISTEMAS help This sets the frequency of the system clock (including SDRAM or DDR). This can be between 1 and 15 Loading Loading @@ -492,11 +501,13 @@ config MEM_SIZE default 64 if BFIN561_EZKIT default 128 if BFIN533_STAMP default 64 if PNAV10 default 32 if H8606_HVSISTEMAS config MEM_ADD_WIDTH int "SDRAM Memory Address Width" default 9 if BFIN533_EZKIT default 9 if BFIN561_EZKIT default 9 if H8606_HVSISTEMAS default 10 if BFIN527_EZKIT default 10 if BFIN537_STAMP default 11 if BFIN533_STAMP Loading arch/blackfin/mach-bf533/boards/H8606.c 0 → 100644 +345 −0 Original line number Diff line number Diff line /* * File: arch/blackfin/mach-bf533/H8606.c * Based on: arch/blackfin/mach-bf533/stamp.c * Author: Javier Herrero <jherrero@hvsistemas.es> * * Created: 2007 * Description: Board Info File for the HV Sistemas H8606 board * * Modified: * Copyright 2005 National ICT Australia (NICTA) * Copyright 2004-2006 Analog Devices Inc * Copyright 2007 HV Sistemas S.L. * * Bugs: Enter bugs at http://blackfin.uclinux.org/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, see the file COPYING, or write * to the Free Software Foundation, Inc., * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include <linux/device.h> #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/spi/spi.h> #include <linux/spi/flash.h> #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) #include <linux/usb_isp1362.h> #endif #include <linux/pata_platform.h> #include <linux/irq.h> #include <asm/dma.h> #include <asm/bfin5xx_spi.h> #include <asm/reboot.h> /* * Name the Board for the /proc/cpuinfo */ const char bfin_board_name[] = "HV Sistemas H8606"; #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_BFIN_MODULE) static struct platform_device rtc_device = { .name = "rtc-bfin", .id = -1, }; #endif /* * Driver needs to know address, irq and flag pin. */ #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) static struct resource dm9000_resources[] = { [0] = { .start = 0x20300000, .end = 0x20300000 + 8, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_PF10, .end = IRQ_PF10, .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), }, }; static struct platform_device dm9000_device = { .id = 0, .name = "dm9000", .resource = dm9000_resources, .num_resources = ARRAY_SIZE(dm9000_resources), }; #endif #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) static struct resource smc91x_resources[] = { { .name = "smc91x-regs", .start = 0x20300300, .end = 0x20300300 + 16, .flags = IORESOURCE_MEM, }, { .start = IRQ_PROG_INTB, .end = IRQ_PROG_INTB, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, }, { /* * denotes the flag pin and is used directly if * CONFIG_IRQCHIP_DEMUX_GPIO is defined. */ .start = IRQ_PF7, .end = IRQ_PF7, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, }, }; static struct platform_device smc91x_device = { .name = "smc91x", .id = 0, .num_resources = ARRAY_SIZE(smc91x_resources), .resource = smc91x_resources, }; #endif #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) static struct resource net2272_bfin_resources[] = { { .start = 0x20300000, .end = 0x20300000 + 0x100, .flags = IORESOURCE_MEM, }, { .start = IRQ_PF10, .end = IRQ_PF10, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, }, }; static struct platform_device net2272_bfin_device = { .name = "net2272", .id = -1, .num_resources = ARRAY_SIZE(net2272_bfin_resources), .resource = net2272_bfin_resources, }; #endif #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) /* all SPI peripherals info goes here */ #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) static struct mtd_partition bfin_spi_flash_partitions[] = { { .name = "bootloader", .size = 0x00060000, .offset = 0, .mask_flags = MTD_CAP_ROM }, { .name = "kernel", .size = 0x100000, .offset = 0x60000 }, { .name = "file system", .size = 0x6a0000, .offset = 0x00160000, } }; static struct flash_platform_data bfin_spi_flash_data = { .name = "m25p80", .parts = bfin_spi_flash_partitions, .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), .type = "m25p64", }; /* SPI flash chip (m25p64) */ static struct bfin5xx_spi_chip spi_flash_chip_info = { .enable_dma = 0, /* use dma transfer with this chip*/ .bits_per_word = 8, }; #endif #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) /* SPI ADC chip */ static struct bfin5xx_spi_chip spi_adc_chip_info = { .ctl_reg = 0x1000, .enable_dma = 1, /* use dma transfer with this chip*/ .bits_per_word = 16, }; #endif #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) static struct bfin5xx_spi_chip ad1836_spi_chip_info = { .ctl_reg = 0x1000, .enable_dma = 0, .bits_per_word = 16, }; #endif #if defined(CONFIG_PBX) static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { .ctl_reg = 0x1c04, .enable_dma = 0, .bits_per_word = 8, .cs_change_per_word = 1, }; #endif /* Notice: for blackfin, the speed_hz is the value of register * SPI_BAUD, not the real baudrate */ static struct spi_board_info bfin_spi_board_info[] __initdata = { #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) { /* the modalias must be the same as spi device driver name */ .modalias = "m25p80", /* Name of spi_driver for this device */ /* this value is the baudrate divisor */ .max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */ .bus_num = 0, /* Framework bus number */ .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/ .platform_data = &bfin_spi_flash_data, .controller_data = &spi_flash_chip_info, .mode = SPI_MODE_3, }, #endif #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) { .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ .max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */ .bus_num = 1, /* Framework bus number */ .chip_select = 1, /* Framework chip select. */ .platform_data = NULL, /* No spi_driver specific config */ .controller_data = &spi_adc_chip_info, }, #endif #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) { .modalias = "ad1836-spi", .max_speed_hz = 16, .bus_num = 1, .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, .controller_data = &ad1836_spi_chip_info, }, #endif #if defined(CONFIG_PBX) { .modalias = "fxs-spi", .max_speed_hz = 4, .bus_num = 1, .chip_select = 3, .controller_data = &spi_si3xxx_chip_info, }, { .modalias = "fxo-spi", .max_speed_hz = 4, .bus_num = 1, .chip_select = 2, .controller_data = &spi_si3xxx_chip_info, }, #endif }; /* SPI (0) */ static struct resource bfin_spi0_resource[] = { [0] = { .start = SPI0_REGBASE, .end = SPI0_REGBASE + 0xFF, .flags = IORESOURCE_MEM, }, [1] = { .start = CH_SPI, .end = CH_SPI, .flags = IORESOURCE_IRQ, } }; /* SPI controller data */ static struct bfin5xx_spi_master bfin_spi0_info = { .num_chipselect = 8, .enable_dma = 1, /* master has the ability to do dma transfer */ }; static struct platform_device bfin_spi0_device = { .name = "bfin-spi", .id = 0, /* Bus number */ .num_resources = ARRAY_SIZE(bfin_spi0_resource), .resource = bfin_spi0_resource, .dev = { .platform_data = &bfin_spi0_info, /* Passed to driver */ }, }; #endif /* spi master and devices */ #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) static struct platform_device bfin_fb_device = { .name = "bf537-fb", }; #endif #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) static struct resource bfin_uart_resources[] = { { .start = 0xFFC00400, .end = 0xFFC004FF, .flags = IORESOURCE_MEM, }, }; static struct platform_device bfin_uart_device = { .name = "bfin-uart", .id = 1, .num_resources = ARRAY_SIZE(bfin_uart_resources), .resource = bfin_uart_resources, }; #endif static struct platform_device *stamp_devices[] __initdata = { #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) &rtc_device, #endif #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) &dm9000_device, #endif #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) &smc91x_device, #endif #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) &net2272_bfin_device, #endif #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) &bfin_spi0_device, #endif #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) &bfin_uart_device, #endif }; static int __init H8606_init(void) { printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n"); printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); #endif return 0; } arch_initcall(H8606_init); No newline at end of file arch/blackfin/mach-bf533/boards/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -6,3 +6,4 @@ obj-$(CONFIG_GENERIC_BOARD) += generic_board.o obj-$(CONFIG_BFIN533_STAMP) += stamp.o obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o obj-$(CONFIG_BFIN533_BLUETECHNIX_CM) += cm_bf533.o obj-$(CONFIG_H8606_HVSISTEMAS) += H8606.o Loading
arch/blackfin/Kconfig +13 −2 Original line number Diff line number Diff line Loading @@ -295,6 +295,12 @@ config PNAV10 help PNAV 1.0 board Support. config H8606_HVSISTEMAS bool "HV Sistemas H8606" depends on (BF532) help HV Sistemas H8606 board support. config GENERIC_BOARD bool "Custom" depends on (BF537 || BF536 \ Loading @@ -317,7 +323,8 @@ config MEM_MT48LC64M4A2FB_7E config MEM_MT48LC16M16A2TG_75 bool depends on (BFIN533_EZKIT || BFIN561_EZKIT \ || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM) || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM \ || H8606_HVSISTEMAS) default y config MEM_MT48LC32M8A2_75 Loading Loading @@ -366,7 +373,7 @@ config CLKIN_HZ int "Crystal Frequency in Hz" default "11059200" if BFIN533_STAMP default "27000000" if BFIN533_EZKIT default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT) default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS) default "30000000" if BFIN561_EZKIT default "24576000" if PNAV10 help Loading Loading @@ -404,6 +411,7 @@ config VCO_MULT default "20" if BFIN537_BLUETECHNIX_CM default "20" if BFIN561_BLUETECHNIX_CM default "20" if BFIN561_EZKIT default "16" if H8606_HVSISTEMAS help This controls the frequency of the on-chip PLL. This can be between 1 and 64. PLL Frequency = (Crystal Frequency) * (this setting) Loading Loading @@ -440,6 +448,7 @@ config SCLK_DIV default 4 if BFIN537_BLUETECHNIX_CM default 4 if BFIN561_BLUETECHNIX_CM default 5 if BFIN561_EZKIT default 3 if H8606_HVSISTEMAS help This sets the frequency of the system clock (including SDRAM or DDR). This can be between 1 and 15 Loading Loading @@ -492,11 +501,13 @@ config MEM_SIZE default 64 if BFIN561_EZKIT default 128 if BFIN533_STAMP default 64 if PNAV10 default 32 if H8606_HVSISTEMAS config MEM_ADD_WIDTH int "SDRAM Memory Address Width" default 9 if BFIN533_EZKIT default 9 if BFIN561_EZKIT default 9 if H8606_HVSISTEMAS default 10 if BFIN527_EZKIT default 10 if BFIN537_STAMP default 11 if BFIN533_STAMP Loading
arch/blackfin/mach-bf533/boards/H8606.c 0 → 100644 +345 −0 Original line number Diff line number Diff line /* * File: arch/blackfin/mach-bf533/H8606.c * Based on: arch/blackfin/mach-bf533/stamp.c * Author: Javier Herrero <jherrero@hvsistemas.es> * * Created: 2007 * Description: Board Info File for the HV Sistemas H8606 board * * Modified: * Copyright 2005 National ICT Australia (NICTA) * Copyright 2004-2006 Analog Devices Inc * Copyright 2007 HV Sistemas S.L. * * Bugs: Enter bugs at http://blackfin.uclinux.org/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, see the file COPYING, or write * to the Free Software Foundation, Inc., * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include <linux/device.h> #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/spi/spi.h> #include <linux/spi/flash.h> #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) #include <linux/usb_isp1362.h> #endif #include <linux/pata_platform.h> #include <linux/irq.h> #include <asm/dma.h> #include <asm/bfin5xx_spi.h> #include <asm/reboot.h> /* * Name the Board for the /proc/cpuinfo */ const char bfin_board_name[] = "HV Sistemas H8606"; #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_BFIN_MODULE) static struct platform_device rtc_device = { .name = "rtc-bfin", .id = -1, }; #endif /* * Driver needs to know address, irq and flag pin. */ #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) static struct resource dm9000_resources[] = { [0] = { .start = 0x20300000, .end = 0x20300000 + 8, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_PF10, .end = IRQ_PF10, .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), }, }; static struct platform_device dm9000_device = { .id = 0, .name = "dm9000", .resource = dm9000_resources, .num_resources = ARRAY_SIZE(dm9000_resources), }; #endif #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) static struct resource smc91x_resources[] = { { .name = "smc91x-regs", .start = 0x20300300, .end = 0x20300300 + 16, .flags = IORESOURCE_MEM, }, { .start = IRQ_PROG_INTB, .end = IRQ_PROG_INTB, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, }, { /* * denotes the flag pin and is used directly if * CONFIG_IRQCHIP_DEMUX_GPIO is defined. */ .start = IRQ_PF7, .end = IRQ_PF7, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, }, }; static struct platform_device smc91x_device = { .name = "smc91x", .id = 0, .num_resources = ARRAY_SIZE(smc91x_resources), .resource = smc91x_resources, }; #endif #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) static struct resource net2272_bfin_resources[] = { { .start = 0x20300000, .end = 0x20300000 + 0x100, .flags = IORESOURCE_MEM, }, { .start = IRQ_PF10, .end = IRQ_PF10, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, }, }; static struct platform_device net2272_bfin_device = { .name = "net2272", .id = -1, .num_resources = ARRAY_SIZE(net2272_bfin_resources), .resource = net2272_bfin_resources, }; #endif #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) /* all SPI peripherals info goes here */ #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) static struct mtd_partition bfin_spi_flash_partitions[] = { { .name = "bootloader", .size = 0x00060000, .offset = 0, .mask_flags = MTD_CAP_ROM }, { .name = "kernel", .size = 0x100000, .offset = 0x60000 }, { .name = "file system", .size = 0x6a0000, .offset = 0x00160000, } }; static struct flash_platform_data bfin_spi_flash_data = { .name = "m25p80", .parts = bfin_spi_flash_partitions, .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), .type = "m25p64", }; /* SPI flash chip (m25p64) */ static struct bfin5xx_spi_chip spi_flash_chip_info = { .enable_dma = 0, /* use dma transfer with this chip*/ .bits_per_word = 8, }; #endif #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) /* SPI ADC chip */ static struct bfin5xx_spi_chip spi_adc_chip_info = { .ctl_reg = 0x1000, .enable_dma = 1, /* use dma transfer with this chip*/ .bits_per_word = 16, }; #endif #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) static struct bfin5xx_spi_chip ad1836_spi_chip_info = { .ctl_reg = 0x1000, .enable_dma = 0, .bits_per_word = 16, }; #endif #if defined(CONFIG_PBX) static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { .ctl_reg = 0x1c04, .enable_dma = 0, .bits_per_word = 8, .cs_change_per_word = 1, }; #endif /* Notice: for blackfin, the speed_hz is the value of register * SPI_BAUD, not the real baudrate */ static struct spi_board_info bfin_spi_board_info[] __initdata = { #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) { /* the modalias must be the same as spi device driver name */ .modalias = "m25p80", /* Name of spi_driver for this device */ /* this value is the baudrate divisor */ .max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */ .bus_num = 0, /* Framework bus number */ .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/ .platform_data = &bfin_spi_flash_data, .controller_data = &spi_flash_chip_info, .mode = SPI_MODE_3, }, #endif #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) { .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ .max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */ .bus_num = 1, /* Framework bus number */ .chip_select = 1, /* Framework chip select. */ .platform_data = NULL, /* No spi_driver specific config */ .controller_data = &spi_adc_chip_info, }, #endif #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) { .modalias = "ad1836-spi", .max_speed_hz = 16, .bus_num = 1, .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, .controller_data = &ad1836_spi_chip_info, }, #endif #if defined(CONFIG_PBX) { .modalias = "fxs-spi", .max_speed_hz = 4, .bus_num = 1, .chip_select = 3, .controller_data = &spi_si3xxx_chip_info, }, { .modalias = "fxo-spi", .max_speed_hz = 4, .bus_num = 1, .chip_select = 2, .controller_data = &spi_si3xxx_chip_info, }, #endif }; /* SPI (0) */ static struct resource bfin_spi0_resource[] = { [0] = { .start = SPI0_REGBASE, .end = SPI0_REGBASE + 0xFF, .flags = IORESOURCE_MEM, }, [1] = { .start = CH_SPI, .end = CH_SPI, .flags = IORESOURCE_IRQ, } }; /* SPI controller data */ static struct bfin5xx_spi_master bfin_spi0_info = { .num_chipselect = 8, .enable_dma = 1, /* master has the ability to do dma transfer */ }; static struct platform_device bfin_spi0_device = { .name = "bfin-spi", .id = 0, /* Bus number */ .num_resources = ARRAY_SIZE(bfin_spi0_resource), .resource = bfin_spi0_resource, .dev = { .platform_data = &bfin_spi0_info, /* Passed to driver */ }, }; #endif /* spi master and devices */ #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) static struct platform_device bfin_fb_device = { .name = "bf537-fb", }; #endif #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) static struct resource bfin_uart_resources[] = { { .start = 0xFFC00400, .end = 0xFFC004FF, .flags = IORESOURCE_MEM, }, }; static struct platform_device bfin_uart_device = { .name = "bfin-uart", .id = 1, .num_resources = ARRAY_SIZE(bfin_uart_resources), .resource = bfin_uart_resources, }; #endif static struct platform_device *stamp_devices[] __initdata = { #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) &rtc_device, #endif #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) &dm9000_device, #endif #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) &smc91x_device, #endif #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) &net2272_bfin_device, #endif #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) &bfin_spi0_device, #endif #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) &bfin_uart_device, #endif }; static int __init H8606_init(void) { printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n"); printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); #endif return 0; } arch_initcall(H8606_init); No newline at end of file
arch/blackfin/mach-bf533/boards/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -6,3 +6,4 @@ obj-$(CONFIG_GENERIC_BOARD) += generic_board.o obj-$(CONFIG_BFIN533_STAMP) += stamp.o obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o obj-$(CONFIG_BFIN533_BLUETECHNIX_CM) += cm_bf533.o obj-$(CONFIG_H8606_HVSISTEMAS) += H8606.o