Commit ab68d7eb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'loongarch-fixes-6.14-1' of... 

Merge tag 'loongarch-fixes-6.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson

Pull LoongArch fixes from Huacai Chen:
 "Fix bugs about idle, kernel_page_present(), IP checksum and KVM, plus
  some trival cleanups"

* tag 'loongarch-fixes-6.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson:
  LoongArch: KVM: Set host with kernel mode when switch to VM mode
  LoongArch: KVM: Remove duplicated cache attribute setting
  LoongArch: KVM: Fix typo issue about GCFG feature detection
  LoongArch: csum: Fix OoB access in IP checksum code for negative lengths
  LoongArch: Remove the deprecated notifier hook mechanism
  LoongArch: Use str_yes_no() helper function for /proc/cpuinfo
  LoongArch: Fix kernel_page_present() for KPRANGE/XKPRANGE
  LoongArch: Fix idle VS timer enqueue
parents d63609e4 3011b29e

arch/loongarch/include/asm/cpu-info.h

+0 −21
Original line number Diff line number Diff line
@@ -76,27 +76,6 @@ extern const char *__cpu_full_name[]; 
#define cpu_family_string()	__cpu_family[raw_smp_processor_id()]

#define cpu_full_name_string()	__cpu_full_name[raw_smp_processor_id()]



struct seq_file;

struct notifier_block;



extern int register_proc_cpuinfo_notifier(struct notifier_block *nb);

extern int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v);



#define proc_cpuinfo_notifier(fn, pri)					\

({									\

	static struct notifier_block fn##_nb = {			\

		.notifier_call = fn,					\

		.priority = pri						\

	};								\

									\

	register_proc_cpuinfo_notifier(&fn##_nb);			\

})



struct proc_cpuinfo_notifier_args {

	struct seq_file *m;

	unsigned long n;

};



static inline bool cpus_are_siblings(int cpua, int cpub)

{

	struct cpuinfo_loongarch *infoa = &cpu_data[cpua];

arch/loongarch/include/asm/smp.h

+2 −0
Original line number Diff line number Diff line
@@ -77,6 +77,8 @@ extern int __cpu_logical_map[NR_CPUS]; 
#define SMP_IRQ_WORK		BIT(ACTION_IRQ_WORK)

#define SMP_CLEAR_VECTOR	BIT(ACTION_CLEAR_VECTOR)



struct seq_file;



struct secondary_data {

	unsigned long stack;

	unsigned long thread_info;

arch/loongarch/kernel/genex.S

+15 −13
Original line number Diff line number Diff line
@@ -18,16 +18,19 @@ 


	.align	5

SYM_FUNC_START(__arch_cpu_idle)

	/* start of rollback region */

	LONG_L	t0, tp, TI_FLAGS

	nop

	andi	t0, t0, _TIF_NEED_RESCHED

	bnez	t0, 1f

	nop

	nop

	nop

	/* start of idle interrupt region */

	ori	t0, zero, CSR_CRMD_IE

	/* idle instruction needs irq enabled */

	csrxchg	t0, t0, LOONGARCH_CSR_CRMD

	/*

	 * If an interrupt lands here; between enabling interrupts above and

	 * going idle on the next instruction, we must *NOT* go idle since the

	 * interrupt could have set TIF_NEED_RESCHED or caused an timer to need

	 * reprogramming. Fall through -- see handle_vint() below -- and have

	 * the idle loop take care of things.

	 */

	idle	0

	/* end of rollback region */

	/* end of idle interrupt region */

1:	jr	ra

SYM_FUNC_END(__arch_cpu_idle)
@@ -35,11 +38,10 @@ SYM_CODE_START(handle_vint) 
	UNWIND_HINT_UNDEFINED

	BACKUP_T0T1

	SAVE_ALL

	la_abs	t1, __arch_cpu_idle

	la_abs	t1, 1b

	LONG_L	t0, sp, PT_ERA

	/* 32 byte rollback region */

	ori	t0, t0, 0x1f

	xori	t0, t0, 0x1f

	/* 3 instructions idle interrupt region */

	ori	t0, t0, 0b1100

	bne	t0, t1, 1f

	LONG_S	t0, sp, PT_ERA

1:	move	a0, sp

arch/loongarch/kernel/idle.c

+1 −2
Original line number Diff line number Diff line
@@ -11,7 +11,6 @@ 


void __cpuidle arch_cpu_idle(void)

{

	raw_local_irq_enable();

	__arch_cpu_idle(); /* idle instruction needs irq enabled */

	__arch_cpu_idle();

	raw_local_irq_disable();

}

arch/loongarch/kernel/proc.c

+3 −26
Original line number Diff line number Diff line
@@ -13,28 +13,12 @@ 
#include <asm/processor.h>

#include <asm/time.h>



/*

 * No lock; only written during early bootup by CPU 0.

 */

static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain);



int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb)

{

	return raw_notifier_chain_register(&proc_cpuinfo_chain, nb);

}



int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v)

{

	return raw_notifier_call_chain(&proc_cpuinfo_chain, val, v);

}



static int show_cpuinfo(struct seq_file *m, void *v)

{

	unsigned long n = (unsigned long) v - 1;

	unsigned int isa = cpu_data[n].isa_level;

	unsigned int version = cpu_data[n].processor_id & 0xff;

	unsigned int fp_version = cpu_data[n].fpu_vers;

	struct proc_cpuinfo_notifier_args proc_cpuinfo_notifier_args;



#ifdef CONFIG_SMP

	if (!cpu_online(n))
@@ -91,20 +75,13 @@ static int show_cpuinfo(struct seq_file *m, void *v) 
	if (cpu_has_lbt_mips)	seq_printf(m, " lbt_mips");

	seq_printf(m, "\n");



	seq_printf(m, "Hardware Watchpoint\t: %s",

		      cpu_has_watch ? "yes, " : "no\n");

	seq_printf(m, "Hardware Watchpoint\t: %s", str_yes_no(cpu_has_watch));

	if (cpu_has_watch) {

		seq_printf(m, "iwatch count: %d, dwatch count: %d\n",

		seq_printf(m, ", iwatch count: %d, dwatch count: %d",

		      cpu_data[n].watch_ireg_count, cpu_data[n].watch_dreg_count);

	}



	proc_cpuinfo_notifier_args.m = m;

	proc_cpuinfo_notifier_args.n = n;



	raw_notifier_call_chain(&proc_cpuinfo_chain, 0,

				&proc_cpuinfo_notifier_args);



	seq_printf(m, "\n");

	seq_printf(m, "\n\n");



	return 0;

}