Commit abc00ffd authored by Nishanth Menon's avatar Nishanth Menon Committed by Viresh Kumar
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cpufreq: ti-cpufreq: Introduce quirks to handle syscon fails appropriately 



Commit b4bc9f9e ("cpufreq: ti-cpufreq: add support for omap34xx
and omap36xx") introduced special handling for OMAP3 class devices
where syscon node may not be present. However, this also creates a bug
where the syscon node is present, however the offset used to read
is beyond the syscon defined range.

Fix this by providing a quirk option that is populated when such
special handling is required. This allows proper failure for all other
platforms when the syscon node and efuse offsets are mismatched.

Fixes: b4bc9f9e ("cpufreq: ti-cpufreq: add support for omap34xx and omap36xx")
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Tested-by: default avatarDhruva Gole <d-gole@ti.com>
Reviewed-by: default avatarKevin Hilman <khilman@baylibre.com>
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
parent 2b7ec33e

drivers/cpufreq/ti-cpufreq.c

+8 −2
Original line number Diff line number Diff line
@@ -90,6 +90,9 @@ struct ti_cpufreq_soc_data { 
	unsigned long efuse_shift;

	unsigned long rev_offset;

	bool multi_regulator;

/* Backward compatibility hack: Might have missing syscon */

#define TI_QUIRK_SYSCON_MAY_BE_MISSING	0x1

	u8 quirks;

};



struct ti_cpufreq_data {
@@ -254,6 +257,7 @@ static struct ti_cpufreq_soc_data omap34xx_soc_data = { 
	.efuse_mask = BIT(3),

	.rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,

	.multi_regulator = false,

	.quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING,

};



/*
@@ -281,6 +285,7 @@ static struct ti_cpufreq_soc_data omap36xx_soc_data = { 
	.efuse_mask = BIT(9),

	.rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,

	.multi_regulator = true,

	.quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING,

};



/*
@@ -295,6 +300,7 @@ static struct ti_cpufreq_soc_data am3517_soc_data = { 
	.efuse_mask = 0,

	.rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,

	.multi_regulator = false,

	.quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING,

};



static struct ti_cpufreq_soc_data am625_soc_data = {
@@ -340,7 +346,7 @@ static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data, 


	ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,

			  &efuse);

	if (ret == -EIO) {

	if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) {

		/* not a syscon register! */

		void __iomem *regs = ioremap(OMAP3_SYSCON_BASE +

				opp_data->soc_data->efuse_offset, 4);
@@ -381,7 +387,7 @@ static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data, 


	ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset,

			  &revision);

	if (ret == -EIO) {

	if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) {

		/* not a syscon register! */

		void __iomem *regs = ioremap(OMAP3_SYSCON_BASE +

				opp_data->soc_data->rev_offset, 4);