Commit abfa6d6f authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

Merge tag 'timers-v6.15-rc1' of... 

Merge tag 'timers-v6.15-rc1' of https://git.linaro.org/people/daniel.lezcano/linux into timers/clocksource

Pull clocksource/event driver updates from Daniel Lezcano:

   - Fixed indentation and style in DTS example in the DT bindings
     (Krzysztof Kozlowski)

   - Added the samsung,exynos990-mct compatible binding (Igor Belwon)

   - Added the samsung,exynos2200-mct-peris compatible binding (Ivaylo
     Ivanov)

   - Fixed a comment spelling error in the exynos-mct driver (Anindya
     Sundar Gayen)

   - Added the support for suspend / resume in the stm32-lptimer driver
     (Fabrice Gasnier)

   - Fixed use of wakeup capable instead of init wakeup in the
     stm32-lptimer driver (Alexandre Torgue)

   - Add SiFive CLINT2 DT bindings (Nick Hu)

Link: https://lore.kernel.org/all/57f79277-72c9-4597-a40b-d14e30d14c60@linaro.org
parents 7eb17214 0f920690

Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml

+4 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ properties: 
          - enum:

              - axis,artpec8-mct

              - google,gs101-mct

              - samsung,exynos2200-mct-peris

              - samsung,exynos3250-mct

              - samsung,exynos5250-mct

              - samsung,exynos5260-mct
@@ -34,6 +35,7 @@ properties: 
              - samsung,exynos5433-mct

              - samsung,exynos850-mct

              - samsung,exynos8895-mct

              - samsung,exynos990-mct

              - tesla,fsd-mct

          - const: samsung,exynos4210-mct
@@ -130,11 +132,13 @@ allOf: 
            enum:

              - axis,artpec8-mct

              - google,gs101-mct

              - samsung,exynos2200-mct-peris

              - samsung,exynos5260-mct

              - samsung,exynos5420-mct

              - samsung,exynos5433-mct

              - samsung,exynos850-mct

              - samsung,exynos8895-mct

              - samsung,exynos990-mct

    then:

      properties:

        interrupts:

Documentation/devicetree/bindings/timer/sifive,clint.yaml

+23 −1
Original line number Diff line number Diff line
@@ -36,6 +36,12 @@ properties: 
              - starfive,jh7110-clint   # StarFive JH7110

              - starfive,jh8100-clint   # StarFive JH8100

          - const: sifive,clint0        # SiFive CLINT v0 IP block

      - items:

          - {}

          - const: sifive,clint2        # SiFive CLINT v2 IP block

        description:

          SiFive CLINT v2 is the HRT that supports the Zicntr. The control of sifive,clint2

          differs from that of sifive,clint0, making them incompatible.

      - items:

          - enum:

              - allwinner,sun20i-d1-clint
@@ -62,6 +68,22 @@ properties: 
    minItems: 1

    maxItems: 4095



  sifive,fine-ctr-bits:

    maximum: 15

    description: The width in bits of the fine counter.



if:

  properties:

    compatible:

      contains:

        const: sifive,clint2

then:

  required:

    - sifive,fine-ctr-bits

else:

  properties:

    sifive,fine-ctr-bits: false



additionalProperties: false



required:

drivers/clocksource/exynos_mct.c

+1 −1
Original line number Diff line number Diff line
@@ -238,7 +238,7 @@ static cycles_t exynos4_read_current_timer(void) 
static int __init exynos4_clocksource_init(bool frc_shared)

{

	/*

	 * When the frc is shared, the main processer should have already

	 * When the frc is shared, the main processor should have already

	 * turned it on and we shouldn't be writing to TCON.

	 */

	if (frc_shared)

drivers/clocksource/timer-stm32-lp.c

+30 −6
Original line number Diff line number Diff line
@@ -24,7 +24,9 @@ struct stm32_lp_private { 
	struct regmap *reg;

	struct clock_event_device clkevt;

	unsigned long period;

	u32 psc;

	struct device *dev;

	struct clk *clk;

};



static struct stm32_lp_private*
@@ -120,6 +122,27 @@ static void stm32_clkevent_lp_set_prescaler(struct stm32_lp_private *priv, 
	/* Adjust rate and period given the prescaler value */

	*rate = DIV_ROUND_CLOSEST(*rate, (1 << i));

	priv->period = DIV_ROUND_UP(*rate, HZ);

	priv->psc = i;

}



static void stm32_clkevent_lp_suspend(struct clock_event_device *clkevt)

{

	struct stm32_lp_private *priv = to_priv(clkevt);



	stm32_clkevent_lp_shutdown(clkevt);



	/* balance clk_prepare_enable() from the probe */

	clk_disable_unprepare(priv->clk);

}



static void stm32_clkevent_lp_resume(struct clock_event_device *clkevt)

{

	struct stm32_lp_private *priv = to_priv(clkevt);



	clk_prepare_enable(priv->clk);



	/* restore prescaler */

	regmap_write(priv->reg, STM32_LPTIM_CFGR, priv->psc << CFGR_PSC_OFFSET);

}



static void stm32_clkevent_lp_init(struct stm32_lp_private *priv,
@@ -134,6 +157,8 @@ static void stm32_clkevent_lp_init(struct stm32_lp_private *priv, 
	priv->clkevt.set_state_oneshot = stm32_clkevent_lp_set_oneshot;

	priv->clkevt.set_next_event = stm32_clkevent_lp_set_next_event;

	priv->clkevt.rating = STM32_LP_RATING;

	priv->clkevt.suspend = stm32_clkevent_lp_suspend;

	priv->clkevt.resume = stm32_clkevent_lp_resume;



	clockevents_config_and_register(&priv->clkevt, rate, 0x1,

					STM32_LPTIM_MAX_ARR);
@@ -151,11 +176,12 @@ static int stm32_clkevent_lp_probe(struct platform_device *pdev) 
		return -ENOMEM;



	priv->reg = ddata->regmap;

	ret = clk_prepare_enable(ddata->clk);

	priv->clk = ddata->clk;

	ret = clk_prepare_enable(priv->clk);

	if (ret)

		return -EINVAL;



	rate = clk_get_rate(ddata->clk);

	rate = clk_get_rate(priv->clk);

	if (!rate) {

		ret = -EINVAL;

		goto out_clk_disable;
@@ -168,9 +194,7 @@ static int stm32_clkevent_lp_probe(struct platform_device *pdev) 
	}



	if (of_property_read_bool(pdev->dev.parent->of_node, "wakeup-source")) {

		ret = device_init_wakeup(&pdev->dev, true);

		if (ret)

			goto out_clk_disable;

		device_set_wakeup_capable(&pdev->dev, true);



		ret = dev_pm_set_wake_irq(&pdev->dev, irq);

		if (ret)
@@ -191,7 +215,7 @@ static int stm32_clkevent_lp_probe(struct platform_device *pdev) 
	return 0;



out_clk_disable:

	clk_disable_unprepare(ddata->clk);

	clk_disable_unprepare(priv->clk);

	return ret;

}

Documentation/devicetree/bindings/timer/arm,twd-timer.yaml

+3 −3

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Documentation/devicetree/bindings/timer/renesas,tmu.yaml

+11 −11

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Documentation/devicetree/bindings/timer/renesas,tpu.yaml

+4 −4

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Documentation/devicetree/bindings/timer/renesas,cmt.yaml

+22 −22

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Documentation/devicetree/bindings/timer/renesas,em-sti.yaml

+5 −5

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Documentation/devicetree/bindings/timer/renesas,mtu2.yaml

+7 −7

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Documentation/devicetree/bindings/timer/renesas,ostm.yaml

+5 −5

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