Commit ac308609 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull arm64 fixes from Catalin Marinas:
 "A couple of build/config issues and expanding the speculative SSBS
  workaround to more CPUs:

   - Expand the speculative SSBS workaround to cover Cortex-A715,
     Neoverse-N3 and Microsoft Azure Cobalt 100

   - Force position-independent veneers - in some kernel configurations,
     the LLD linker generates position-dependent veneers for otherwise
     position-independent code, resulting in early boot-time failures

   - Fix Kconfig selection of HAVE_DYNAMIC_FTRACE_WITH_ARGS so that it
     is not enabled when not supported by the combination of clang and
     GNU ld"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: Subscribe Microsoft Azure Cobalt 100 to erratum 3194386
  arm64: fix selection of HAVE_DYNAMIC_FTRACE_WITH_ARGS
  arm64: errata: Expand speculative SSBS workaround once more
  arm64: cputype: Add Neoverse-N3 definitions
  arm64: Force position-independent veneers
parents 7943f06c 3eddb108
Loading
Loading
Loading
Loading
+6 −0
Original line number Diff line number Diff line
@@ -146,6 +146,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM            | Cortex-A715     | #2645198        | ARM64_ERRATUM_2645198       |
+----------------+-----------------+-----------------+-----------------------------+
| ARM            | Cortex-A715     | #3456084        | ARM64_ERRATUM_3194386       |
+----------------+-----------------+-----------------+-----------------------------+
| ARM            | Cortex-A720     | #3456091        | ARM64_ERRATUM_3194386       |
+----------------+-----------------+-----------------+-----------------------------+
| ARM            | Cortex-A725     | #3456106        | ARM64_ERRATUM_3194386       |
@@ -186,6 +188,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM            | Neoverse-N2     | #3324339        | ARM64_ERRATUM_3194386       |
+----------------+-----------------+-----------------+-----------------------------+
| ARM            | Neoverse-N3     | #3456111        | ARM64_ERRATUM_3194386       |
+----------------+-----------------+-----------------+-----------------------------+
| ARM            | Neoverse-V1     | #1619801        | N/A                         |
+----------------+-----------------+-----------------+-----------------------------+
| ARM            | Neoverse-V1     | #3324341        | ARM64_ERRATUM_3194386       |
@@ -289,3 +293,5 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| Microsoft      | Azure Cobalt 100| #2253138        | ARM64_ERRATUM_2253138       |
+----------------+-----------------+-----------------+-----------------------------+
| Microsoft      | Azure Cobalt 100| #3324339        | ARM64_ERRATUM_3194386       |
+----------------+-----------------+-----------------+-----------------------------+
+4 −3
Original line number Diff line number Diff line
@@ -200,7 +200,8 @@ config ARM64
	select HAVE_DMA_CONTIGUOUS
	select HAVE_DYNAMIC_FTRACE
	select HAVE_DYNAMIC_FTRACE_WITH_ARGS \
		if $(cc-option,-fpatchable-function-entry=2)
		if (GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS || \
		    CLANG_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS)
	select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS \
		if DYNAMIC_FTRACE_WITH_ARGS && DYNAMIC_FTRACE_WITH_CALL_OPS
	select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS \
@@ -286,12 +287,10 @@ config CLANG_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS
	def_bool CC_IS_CLANG
	# https://github.com/ClangBuiltLinux/linux/issues/1507
	depends on AS_IS_GNU || (AS_IS_LLVM && (LD_IS_LLD || LD_VERSION >= 23600))
	select HAVE_DYNAMIC_FTRACE_WITH_ARGS

config GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS
	def_bool CC_IS_GCC
	depends on $(cc-option,-fpatchable-function-entry=2)
	select HAVE_DYNAMIC_FTRACE_WITH_ARGS

config 64BIT
	def_bool y
@@ -1097,6 +1096,7 @@ config ARM64_ERRATUM_3194386
	  * ARM Cortex-A78C erratum 3324346
	  * ARM Cortex-A78C erratum 3324347
	  * ARM Cortex-A710 erratam 3324338
	  * ARM Cortex-A715 errartum 3456084
	  * ARM Cortex-A720 erratum 3456091
	  * ARM Cortex-A725 erratum 3456106
	  * ARM Cortex-X1 erratum 3324344
@@ -1107,6 +1107,7 @@ config ARM64_ERRATUM_3194386
	  * ARM Cortex-X925 erratum 3324334
	  * ARM Neoverse-N1 erratum 3324349
	  * ARM Neoverse N2 erratum 3324339
	  * ARM Neoverse-N3 erratum 3456111
	  * ARM Neoverse-V1 erratum 3324341
	  * ARM Neoverse V2 erratum 3324336
	  * ARM Neoverse-V3 erratum 3312417
+1 −1
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@
#
# Copyright (C) 1995-2001 by Russell King

LDFLAGS_vmlinux	:=--no-undefined -X
LDFLAGS_vmlinux	:=--no-undefined -X --pic-veneer

ifeq ($(CONFIG_RELOCATABLE), y)
# Pass --no-apply-dynamic-relocs to restore pre-binutils-2.27 behaviour
+2 −0
Original line number Diff line number Diff line
@@ -94,6 +94,7 @@
#define ARM_CPU_PART_NEOVERSE_V3	0xD84
#define ARM_CPU_PART_CORTEX_X925	0xD85
#define ARM_CPU_PART_CORTEX_A725	0xD87
#define ARM_CPU_PART_NEOVERSE_N3	0xD8E

#define APM_CPU_PART_XGENE		0x000
#define APM_CPU_VAR_POTENZA		0x00
@@ -176,6 +177,7 @@
#define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3)
#define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925)
#define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725)
#define MIDR_NEOVERSE_N3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N3)
#define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
+3 −0
Original line number Diff line number Diff line
@@ -439,6 +439,7 @@ static const struct midr_range erratum_spec_ssbs_list[] = {
	MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),
	MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C),
	MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),
	MIDR_ALL_VERSIONS(MIDR_CORTEX_A715),
	MIDR_ALL_VERSIONS(MIDR_CORTEX_A720),
	MIDR_ALL_VERSIONS(MIDR_CORTEX_A725),
	MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),
@@ -447,8 +448,10 @@ static const struct midr_range erratum_spec_ssbs_list[] = {
	MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),
	MIDR_ALL_VERSIONS(MIDR_CORTEX_X4),
	MIDR_ALL_VERSIONS(MIDR_CORTEX_X925),
	MIDR_ALL_VERSIONS(MIDR_MICROSOFT_AZURE_COBALT_100),
	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),
	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N3),
	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),
	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),