Commit ac73c097 authored by Walker Chen's avatar Walker Chen Committed by Conor Dooley
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riscv: dts: starfive: jh7110: add dma controller node 



Add the dma controller node for the Starfive JH7110 SoC.

Reviewed-by: default avatarEmil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: default avatarWalker Chen <walker.chen@starfivetech.com>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
parent 74fb20c8

arch/riscv/boot/dts/starfive/jh7110.dtsi

+18 −0
Original line number Diff line number Diff line
@@ -843,6 +843,24 @@ gmac1: ethernet@16040000 { 
			status = "disabled";

		};



		dma: dma-controller@16050000 {

			compatible = "starfive,jh7110-axi-dma";

			reg = <0x0 0x16050000 0x0 0x10000>;

			clocks = <&stgcrg JH7110_STGCLK_DMA1P_AXI>,

				 <&stgcrg JH7110_STGCLK_DMA1P_AHB>;

			clock-names = "core-clk", "cfgr-clk";

			resets = <&stgcrg JH7110_STGRST_DMA1P_AXI>,

				 <&stgcrg JH7110_STGRST_DMA1P_AHB>;

			interrupts = <73>;

			#dma-cells = <1>;

			dma-channels = <4>;

			snps,dma-masters = <1>;

			snps,data-width = <3>;

			snps,block-size = <65536 65536 65536 65536>;

			snps,priority = <0 1 2 3>;

			snps,axi-max-burst-len = <16>;

		};



		aoncrg: clock-controller@17000000 {

			compatible = "starfive,jh7110-aoncrg";

			reg = <0x0 0x17000000 0x0 0x10000>;