Commit ac76a51d authored by Jouni Högander's avatar Jouni Högander
Browse files

drm/i915/display: Ensure we have "Frame Change" event in DSB commit 



We may have commit which doesn't have any non-arming plane register
writes. In that case there aren't "Frame Change" event before DSB vblank
evasion which hangs as PIPEDSL register is reading as 0 when PSR state is
SRDENT(PSR1) or DEEP_SLEEP(PSR2). Handle this by ensuring "Frame Change"
event at the begin of DSB commit if using PSR/PR.

v3: dsb_commit as a first parameter
v2: use intel_psr_trigger_frame_change_event

Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250213064804.2077127-13-jouni.hogander@intel.com
parent fa27fa48

drivers/gpu/drm/i915/display/intel_display.c

+8 −0
Original line number Diff line number Diff line
@@ -7740,6 +7740,14 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, 
		intel_crtc_planes_update_noarm(new_crtc_state->dsb_commit,

					       state, crtc);



		/*

		 * Ensure we have "Frame Change" event when PSR state is

		 * SRDENT(PSR1) or DEEP_SLEEP(PSR2). Otherwise DSB vblank

		 * evasion hangs as PIPEDSL is reading as 0.

		 */

		intel_psr_trigger_frame_change_event(new_crtc_state->dsb_commit,

						     state, crtc);



		intel_dsb_vblank_evade(state, new_crtc_state->dsb_commit);



		if (intel_crtc_needs_color_update(new_crtc_state))