Commit acca163f authored by Yixun Lan's avatar Yixun Lan Committed by Chen-Yu Tsai
Browse files

arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board 



On Radxa A5E board, the EMAC0 connect to external Maxio MAE0621A PHY,
which features a 25MHz crystal, and using PH8 pin as PHY reset.

Tested on A5E board with schematic V1.20.

Tested-by: default avatarCorentin LABBE <clabbe.montjoie@gmail.com>
Signed-off-by: default avatarYixun Lan <dlan@gentoo.org>
Link: https://patch.msgid.link/20250430-01-sun55i-emac0-v3-4-6fc000bbccbd@gentoo.org


Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent 56766ca6

arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts

+19 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ / { 
	compatible = "radxa,cubie-a5e", "allwinner,sun55i-a527";



	aliases {

		ethernet0 = &emac0;

		serial0 = &uart0;

	};
@@ -54,6 +55,24 @@ &ehci1 { 
	status = "okay";

};



&emac0 {

	phy-mode = "rgmii-id";

	phy-handle = <&ext_rgmii_phy>;

	phy-supply = <&reg_cldo3>;



	allwinner,tx-delay-ps = <300>;

	allwinner,rx-delay-ps = <400>;



	status = "okay";

};



&mdio0 {

	ext_rgmii_phy: ethernet-phy@1 {

		compatible = "ethernet-phy-ieee802.3-c22";

		reg = <1>;

	};

};



&mmc0 {

	vmmc-supply = <&reg_cldo3>;

	cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */