Commit ad0a48e5 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: move reset debug disable handling 



Move everything to the supported resets masks rather than
having an explicit misc checks for this.

Reviewed-by: default avatarJesse Zhang <Jesse.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b5e333e6

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

+3 −5
Original line number Diff line number Diff line
@@ -130,9 +130,7 @@ static enum drm_gpu_sched_stat amdgpu_job_timedout(struct drm_sched_job *s_job) 
	}



	/* attempt a per ring reset */

	if (unlikely(adev->debug_disable_gpu_ring_reset)) {

		dev_err(adev->dev, "Ring reset disabled by debug mask\n");

	} else if (amdgpu_gpu_recovery &&

	if (amdgpu_gpu_recovery &&

	    amdgpu_ring_is_reset_type_supported(ring, AMDGPU_RESET_TYPE_PER_QUEUE) &&

	    ring->funcs->reset) {

		dev_err(adev->dev, "Starting %s ring reset\n",

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

+0 −3
Original line number Diff line number Diff line
@@ -468,9 +468,6 @@ bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid, 
	ktime_t deadline;

	bool ret;



	if (unlikely(ring->adev->debug_disable_soft_recovery))

		return false;



	deadline = ktime_add_us(ktime_get(), 10000);



	if (amdgpu_sriov_vf(ring->adev) || !ring->funcs->soft_recovery || !fence)

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+2 −1
Original line number Diff line number Diff line
@@ -4956,7 +4956,8 @@ static int gfx_v10_0_sw_init(struct amdgpu_ip_block *ip_block) 
		amdgpu_get_soft_full_reset_mask(&adev->gfx.gfx_ring[0]);

	adev->gfx.compute_supported_reset =

		amdgpu_get_soft_full_reset_mask(&adev->gfx.compute_ring[0]);

	if (!amdgpu_sriov_vf(adev)) {

	if (!amdgpu_sriov_vf(adev) &&

	    !adev->debug_disable_gpu_ring_reset) {

		adev->gfx.compute_supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;

		adev->gfx.gfx_supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;

	}

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

+4 −2
Original line number Diff line number Diff line
@@ -1821,13 +1821,15 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block) 
	case IP_VERSION(11, 0, 3):

		if ((adev->gfx.me_fw_version >= 2280) &&

		    (adev->gfx.mec_fw_version >= 2410) &&

		    !amdgpu_sriov_vf(adev)) {

		    !amdgpu_sriov_vf(adev) &&

		    !adev->debug_disable_gpu_ring_reset) {

			adev->gfx.compute_supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;

			adev->gfx.gfx_supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;

		}

		break;

	default:

		if (!amdgpu_sriov_vf(adev)) {

		if (!amdgpu_sriov_vf(adev) &&

		    !adev->debug_disable_gpu_ring_reset) {

			adev->gfx.compute_supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;

			adev->gfx.gfx_supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;

		}

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

+2 −1
Original line number Diff line number Diff line
@@ -1548,7 +1548,8 @@ static int gfx_v12_0_sw_init(struct amdgpu_ip_block *ip_block) 
	case IP_VERSION(12, 0, 1):

		if ((adev->gfx.me_fw_version >= 2660) &&

		    (adev->gfx.mec_fw_version >= 2920) &&

		    !amdgpu_sriov_vf(adev)) {

		    !amdgpu_sriov_vf(adev) &&

		    !adev->debug_disable_gpu_ring_reset) {

			adev->gfx.compute_supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;

			adev->gfx.gfx_supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;

		}