Commit ad390542 authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: Init pcie_index/data address as fallback (v2) 



To allow using this helper for indirect access when
nbio funcs is not available. For instance, in ip
discovery phase.

v2: define macro for pcie_index/data/index_hi fallback.

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarYang Wang <kevinyang.wang@amd.com>
Reviewed-by: default avatarLe Ma <le.ma@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ea0f6dfe

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+18 −5
Original line number Diff line number Diff line
@@ -96,6 +96,9 @@ MODULE_FIRMWARE("amdgpu/navi12_gpu_info.bin"); 
#define AMDGPU_RESUME_MS		2000

#define AMDGPU_MAX_RETRY_LIMIT		2

#define AMDGPU_RETRY_SRIOV_RESET(r) ((r) == -EBUSY || (r) == -ETIMEDOUT || (r) == -EINVAL)

#define AMDGPU_PCIE_INDEX_FALLBACK (0x38 >> 2)

#define AMDGPU_PCIE_INDEX_HI_FALLBACK (0x44 >> 2)

#define AMDGPU_PCIE_DATA_FALLBACK (0x3C >> 2)



static const struct drm_driver amdgpu_kms_driver;
@@ -781,12 +784,22 @@ u32 amdgpu_device_indirect_rreg_ext(struct amdgpu_device *adev, 
	void __iomem *pcie_index_hi_offset;

	void __iomem *pcie_data_offset;



	if (unlikely(!adev->nbio.funcs)) {

		pcie_index = AMDGPU_PCIE_INDEX_FALLBACK;

		pcie_data = AMDGPU_PCIE_DATA_FALLBACK;

	} else {

		pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);

		pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);

	if ((reg_addr >> 32) && (adev->nbio.funcs->get_pcie_index_hi_offset))

		pcie_index_hi = adev->nbio.funcs->get_pcie_index_hi_offset(adev);

	}



	if (reg_addr >> 32) {

		if (unlikely(!adev->nbio.funcs))

			pcie_index_hi = AMDGPU_PCIE_INDEX_HI_FALLBACK;

		else

			pcie_index_hi = adev->nbio.funcs->get_pcie_index_hi_offset(adev);

	} else {

		pcie_index_hi = 0;

	}



	spin_lock_irqsave(&adev->pcie_idx_lock, flags);

	pcie_index_offset = (void __iomem *)adev->rmmio + pcie_index * 4;