Commit adb441ca authored by Dillon Varone's avatar Dillon Varone Committed by Alex Deucher
Browse files

drm/amd/display: Refactor SMU tracing 



[WHY&HOW]
Add new tracing and performance measurements for SMU messaging.

Reviewed-by: default avatarAlvin Lee <alvin.lee2@amd.com>
Signed-off-by: default avatarDillon Varone <Dillon.Varone@amd.com>
Signed-off-by: default avatarIvan Lipski <ivan.lipski@amd.com>
Tested-by: default avatarDan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d19f570c

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c

+2 −2
Original line number Diff line number Diff line
@@ -53,11 +53,11 @@ void dm_perf_trace_timestamp(const char *func_name, unsigned int line, struct dc 
				    func_name, line);

}



void dm_trace_smu_msg(uint32_t msg_id, uint32_t param_in, struct dc_context *ctx)

void dm_trace_smu_enter(uint32_t msg_id, uint32_t param_in, unsigned int delay, struct dc_context *ctx)

{

}



void dm_trace_smu_delay(uint32_t delay, struct dc_context *ctx)

void dm_trace_smu_exit(bool success, uint32_t response, struct dc_context *ctx)

{

}

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

+1 −1
Original line number Diff line number Diff line
@@ -69,7 +69,7 @@ static uint32_t dcn30_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, un 


	/* handle DALSMC_Result_CmdRejectedBusy? */



	TRACE_SMU_DELAY(delay_us * (initial_max_retries - max_retries), clk_mgr->base.ctx);

	TRACE_SMU_MSG_DELAY(0, 0, delay_us * (initial_max_retries - max_retries), clk_mgr->base.ctx);



	return reg;

}

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

+3 −2
Original line number Diff line number Diff line
@@ -63,7 +63,8 @@ static uint32_t dcn32_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, un 
			udelay(delay_us);

	} while (max_retries--);



	TRACE_SMU_DELAY(delay_us * (initial_max_retries - max_retries), clk_mgr->base.ctx);

	TRACE_SMU_MSG_DELAY(0, 0, delay_us * (initial_max_retries - max_retries), clk_mgr->base.ctx);





	return reg;

}
@@ -120,7 +121,7 @@ static uint32_t dcn32_smu_wait_for_response_delay(struct clk_mgr_internal *clk_m 
		*total_delay_us += delay_us;

	} while (max_retries--);



	TRACE_SMU_DELAY(*total_delay_us, clk_mgr->base.ctx);

	TRACE_SMU_MSG_DELAY(0, 0, *total_delay_us, clk_mgr->base.ctx);



	return reg;

}

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c

+8 −4
Original line number Diff line number Diff line
@@ -57,6 +57,8 @@ static bool dcn401_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uin 
	/* Wait for response register to be ready */

	dcn401_smu_wait_for_response(clk_mgr, 10, 200000);



	TRACE_SMU_MSG_ENTER(msg_id, param_in, clk_mgr->base.ctx);



	/* Clear response register */

	REG_WRITE(DAL_RESP_REG, 0);
@@ -71,9 +73,11 @@ static bool dcn401_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uin 
		if (param_out)

			*param_out = REG_READ(DAL_ARG_REG);



		TRACE_SMU_MSG_EXIT(true, param_out ? *param_out : 0, clk_mgr->base.ctx);

		return true;

	}



	TRACE_SMU_MSG_EXIT(false, 0, clk_mgr->base.ctx);

	return false;

}
@@ -102,8 +106,6 @@ static uint32_t dcn401_smu_wait_for_response_delay(struct clk_mgr_internal *clk_ 
		*total_delay_us += delay_us;

	} while (max_retries--);



	TRACE_SMU_DELAY(*total_delay_us, clk_mgr->base.ctx);



	return reg;

}
@@ -115,6 +117,8 @@ static bool dcn401_smu_send_msg_with_param_delay(struct clk_mgr_internal *clk_mg 
	/* Wait for response register to be ready */

	dcn401_smu_wait_for_response_delay(clk_mgr, 10, 200000, &delay1_us);



	TRACE_SMU_MSG_ENTER(msg_id, param_in, clk_mgr->base.ctx);



	/* Clear response register */

	REG_WRITE(DAL_RESP_REG, 0);
@@ -124,18 +128,18 @@ static bool dcn401_smu_send_msg_with_param_delay(struct clk_mgr_internal *clk_mg 
	/* Trigger the message transaction by writing the message ID */

	REG_WRITE(DAL_MSG_REG, msg_id);



	TRACE_SMU_MSG(msg_id, param_in, clk_mgr->base.ctx);



	/* Wait for response */

	if (dcn401_smu_wait_for_response_delay(clk_mgr, 10, 200000, &delay2_us) == DALSMC_Result_OK) {

		if (param_out)

			*param_out = REG_READ(DAL_ARG_REG);



		*total_delay_us = delay1_us + delay2_us;

		TRACE_SMU_MSG_EXIT(true, param_out ? *param_out : 0, clk_mgr->base.ctx);

		return true;

	}



	*total_delay_us = delay1_us + 2000000;

	TRACE_SMU_MSG_EXIT(false, 0, clk_mgr->base.ctx);

	return false;

}

drivers/gpu/drm/amd/display/dc/dm_services.h

+6 −5
Original line number Diff line number Diff line
@@ -277,12 +277,13 @@ void dm_perf_trace_timestamp(const char *func_name, unsigned int line, struct dc 
/*

 * SMU message tracing

 */

void dm_trace_smu_msg(uint32_t msg_id, uint32_t param_in, struct dc_context *ctx);

void dm_trace_smu_delay(uint32_t delay, struct dc_context *ctx);



#define TRACE_SMU_MSG(msg_id, param_in, ctx)	dm_trace_smu_msg(msg_id, param_in, ctx)

#define TRACE_SMU_DELAY(response_delay, ctx)	dm_trace_smu_delay(response_delay, ctx)

void dm_trace_smu_enter(uint32_t msg_id, uint32_t param_in, unsigned int delay, struct dc_context *ctx);

void dm_trace_smu_exit(bool success, uint32_t response, struct dc_context *ctx);



#define TRACE_SMU_MSG_DELAY(msg_id, param_in, delay, ctx)	dm_trace_smu_enter(msg_id, param_in, delay, ctx)

#define TRACE_SMU_MSG(msg_id, param_in, ctx)	dm_trace_smu_enter(msg_id, param_in, 0, ctx)

#define TRACE_SMU_MSG_ENTER(msg_id, param_in, ctx)	dm_trace_smu_enter(msg_id, param_in, 0, ctx)

#define TRACE_SMU_MSG_EXIT(success, response, ctx)	dm_trace_smu_exit(success, response, ctx)



/*

 * DMUB Interfaces