Commit ae510080 authored by Sung Joon Kim's avatar Sung Joon Kim Committed by Alex Deucher
Browse files

drm/amd/display: Disable SYMCLK32_LE root clock gating 



[WHY & HOW]
On display on sequence, enabling SYMCLK32_LE root clock gating
causes issue in link training so disabling it is needed.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarSung Joon Kim <Sungjoon.Kim@amd.com>
Signed-off-by: default avatarAlex Hung <alex.hung@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3766a840

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

+1 −1
Original line number Diff line number Diff line
@@ -736,7 +736,7 @@ static const struct dc_debug_options debug_defaults_drv = { 
			.hdmichar = true,

			.dpstream = true,

			.symclk32_se = true,

			.symclk32_le = true,

			.symclk32_le = false,

			.symclk_fe = true,

			.physymclk = false,

			.dpiasymclk = true,