Commit ae6ec4a3 authored by Raj Kumar Bhagat's avatar Raj Kumar Bhagat Committed by Kalle Valo
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wifi: ath12k: read single_chip_mlo_support parameter from QMI PHY capability



New parameter 'single_chip_mlo_support' was added in QMI PHY
capability response message. This is an optional parameter added
in QCN9274 firmware. This parameter states if the firmware
supports Single-Link Operation (SLO) and Multi-Link Operation (MLO)
within the same device.

If single_chip_mlo_support = 1, then intra device SLO/MLO is supported
in the firmware.
If single_chip_mlo_support = 0, then intra device SLO/MLO is not
supported in the firmware.

Hence, add support to read 'single_chip_mlo_support' parameter from
the QMI PHY capability response message.

Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.0.1-00029-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00209-QCAHKSWPL_SILICONZ-1

Signed-off-by: default avatarRaj Kumar Bhagat <quic_rajkbhag@quicinc.com>
Signed-off-by: default avatarKalle Valo <quic_kvalo@quicinc.com>
Link: https://msgid.link/20240418125609.3867730-2-quic_rajkbhag@quicinc.com
parent b0afabc4
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+22 −2
Original line number Diff line number Diff line
@@ -582,6 +582,24 @@ static const struct qmi_elem_info qmi_wlanfw_phy_cap_resp_msg_v01_ei[] = {
		.offset		= offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,
					   board_id),
	},
	{
		.data_type      = QMI_OPT_FLAG,
		.elem_len       = 1,
		.elem_size      = sizeof(u8),
		.array_type     = NO_ARRAY,
		.tlv_type       = 0x13,
		.offset         = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,
					   single_chip_mlo_support_valid),
	},
	{
		.data_type      = QMI_UNSIGNED_1_BYTE,
		.elem_len       = 1,
		.elem_size      = sizeof(u8),
		.array_type     = NO_ARRAY,
		.tlv_type       = 0x13,
		.offset         = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,
					   single_chip_mlo_support),
	},
	{
		.data_type	= QMI_EOTI,
		.array_type	= NO_ARRAY,
@@ -2160,9 +2178,11 @@ static void ath12k_qmi_phy_cap_send(struct ath12k_base *ab)

	ab->qmi.num_radios = resp.num_phy;

	ath12k_dbg(ab, ATH12K_DBG_QMI, "phy capability resp valid %d num_phy %d valid %d board_id %d\n",
	ath12k_dbg(ab, ATH12K_DBG_QMI,
		   "phy capability resp valid %d num_phy %d valid %d board_id %d valid %d single_chip_mlo_support %d\n",
		   resp.num_phy_valid, resp.num_phy,
		   resp.board_id_valid, resp.board_id);
		   resp.board_id_valid, resp.board_id,
		   resp.single_chip_mlo_support_valid, resp.single_chip_mlo_support);

	return;

+2 −0
Original line number Diff line number Diff line
@@ -267,6 +267,8 @@ struct qmi_wlanfw_phy_cap_resp_msg_v01 {
	u8 num_phy;
	u8 board_id_valid;
	u32 board_id;
	u8 single_chip_mlo_support_valid;
	u8 single_chip_mlo_support;
};

#define QMI_WLANFW_IND_REGISTER_REQ_MSG_V01_MAX_LEN		54