Commit aebd3eb9 authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher
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drm/amdgpu: Assign correct bits for SDMA HDP flush 



HDP Flush request bit can be kept unique per AID, and doesn't need to be
unique SOC-wide. Assign only bits 10-13 for SDMA v4.4.2.

Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 0e95ed64

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

+2 −1
Original line number Diff line number Diff line
@@ -368,7 +368,8 @@ static void sdma_v4_4_2_ring_emit_hdp_flush(struct amdgpu_ring *ring) 
	u32 ref_and_mask = 0;

	const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio.hdp_flush_reg;



	ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0 << ring->me;

	ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0

		       << (ring->me % adev->sdma.num_inst_per_aid);



	sdma_v4_4_2_wait_reg_mem(ring, 0, 1,

			       adev->nbio.funcs->get_hdp_flush_done_offset(adev),