Commit af02dbfe authored by Yevgeny Kliteynik's avatar Yevgeny Kliteynik Committed by Jakub Kicinski
Browse files

net/mlx5: HWS, rework the check if matcher size can be increased



When checking if the matcher size can be increased, check both
match and action RTCs. Also, consider the increasing step - check
that it won't cause the new matcher size to become unsupported.

Additionally, since we're using '+ 1' for action RTC size yet
again, define it as macro and use in all the required places.

Signed-off-by: default avatarYevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: default avatarMark Bloch <mbloch@nvidia.com>
Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20250114130646.1937192-2-tariqt@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 707ec627
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+16 −2
Original line number Diff line number Diff line
@@ -468,8 +468,22 @@ hws_bwc_matcher_size_maxed_out(struct mlx5hws_bwc_matcher *bwc_matcher)
{
	struct mlx5hws_cmd_query_caps *caps = bwc_matcher->matcher->tbl->ctx->caps;

	return bwc_matcher->size_log + MLX5HWS_MATCHER_ASSURED_MAIN_TBL_DEPTH >=
	       caps->ste_alloc_log_max - 1;
	/* check the match RTC size */
	if ((bwc_matcher->size_log +
	     MLX5HWS_MATCHER_ASSURED_MAIN_TBL_DEPTH +
	     MLX5HWS_BWC_MATCHER_SIZE_LOG_STEP) >
	    (caps->ste_alloc_log_max - 1))
		return true;

	/* check the action RTC size */
	if ((bwc_matcher->size_log +
	     MLX5HWS_BWC_MATCHER_SIZE_LOG_STEP +
	     ilog2(roundup_pow_of_two(bwc_matcher->matcher->action_ste.max_stes)) +
	     MLX5HWS_MATCHER_ACTION_RTC_UPDATE_MULT) >
	    (caps->ste_alloc_log_max - 1))
		return true;

	return false;
}

static bool
+4 −2
Original line number Diff line number Diff line
@@ -289,7 +289,8 @@ static int hws_matcher_create_rtc(struct mlx5hws_matcher *matcher,
		 *     (2 to support writing new STEs for update rule))
		 */
		ste->order = ilog2(roundup_pow_of_two(action_ste->max_stes)) +
			     attr->table.sz_row_log + 1;
			     attr->table.sz_row_log +
			     MLX5HWS_MATCHER_ACTION_RTC_UPDATE_MULT;
		rtc_attr.log_size = ste->order;
		rtc_attr.log_depth = 0;
		rtc_attr.update_index_mode = MLX5_IFC_RTC_STE_UPDATE_MODE_BY_OFFSET;
@@ -561,7 +562,8 @@ static int hws_matcher_bind_at(struct mlx5hws_matcher *matcher)
	pool_attr.flags = MLX5HWS_POOL_FLAGS_FOR_STE_ACTION_POOL;
	/* Pool size is similar to action RTC size */
	pool_attr.alloc_log_sz = ilog2(roundup_pow_of_two(action_ste->max_stes)) +
				 matcher->attr.table.sz_row_log + 1;
				 matcher->attr.table.sz_row_log +
				 MLX5HWS_MATCHER_ACTION_RTC_UPDATE_MULT;
	hws_matcher_set_pool_attr(&pool_attr, matcher);
	action_ste->pool = mlx5hws_pool_create(ctx, &pool_attr);
	if (!action_ste->pool) {
+5 −0
Original line number Diff line number Diff line
@@ -18,6 +18,11 @@
/* Required depth of the main large table */
#define MLX5HWS_MATCHER_ASSURED_MAIN_TBL_DEPTH 2

/* Action RTC size multiplier that is required in order
 * to support rule update for rules with action STEs.
 */
#define MLX5HWS_MATCHER_ACTION_RTC_UPDATE_MULT 1

enum mlx5hws_matcher_offset {
	MLX5HWS_MATCHER_OFFSET_TAG_DW1 = 12,
	MLX5HWS_MATCHER_OFFSET_TAG_DW0 = 13,