Unverified Commit af441750 authored by Mark Brown's avatar Mark Brown
Browse files

ASoC: fsl_micfil: Check the difference for i.MX8 and 

Merge series from Shengjiu Wang <shengjiu.wang@nxp.com>:

There are some register difference for i.MX8 and i.MX9
REG_MICFIL_FIFO_CTRL definition is updated.
REG_MICFIL_FSYNC_CTRL, REG_MICFIL_VERID, REG_MICFIL_PARAM are added from
i.MX9.
parents e2d124de aa4f76ef

sound/soc/fsl/fsl_micfil.c

+15 −5
Original line number Diff line number Diff line
@@ -831,7 +831,7 @@ static const struct reg_default fsl_micfil_reg_defaults[] = { 
	{REG_MICFIL_CTRL1,		0x00000000},

	{REG_MICFIL_CTRL2,		0x00000000},

	{REG_MICFIL_STAT,		0x00000000},

	{REG_MICFIL_FIFO_CTRL,		0x00000007},

	{REG_MICFIL_FIFO_CTRL,		0x0000001F},

	{REG_MICFIL_FIFO_STAT,		0x00000000},

	{REG_MICFIL_DATACH0,		0x00000000},

	{REG_MICFIL_DATACH1,		0x00000000},
@@ -855,6 +855,8 @@ static const struct reg_default fsl_micfil_reg_defaults[] = { 


static bool fsl_micfil_readable_reg(struct device *dev, unsigned int reg)

{

	struct fsl_micfil *micfil = dev_get_drvdata(dev);



	switch (reg) {

	case REG_MICFIL_CTRL1:

	case REG_MICFIL_CTRL2:
@@ -872,9 +874,6 @@ static bool fsl_micfil_readable_reg(struct device *dev, unsigned int reg) 
	case REG_MICFIL_DC_CTRL:

	case REG_MICFIL_OUT_CTRL:

	case REG_MICFIL_OUT_STAT:

	case REG_MICFIL_FSYNC_CTRL:

	case REG_MICFIL_VERID:

	case REG_MICFIL_PARAM:

	case REG_MICFIL_VAD0_CTRL1:

	case REG_MICFIL_VAD0_CTRL2:

	case REG_MICFIL_VAD0_STAT:
@@ -883,6 +882,12 @@ static bool fsl_micfil_readable_reg(struct device *dev, unsigned int reg) 
	case REG_MICFIL_VAD0_NDATA:

	case REG_MICFIL_VAD0_ZCD:

		return true;

	case REG_MICFIL_FSYNC_CTRL:

	case REG_MICFIL_VERID:

	case REG_MICFIL_PARAM:

		if (micfil->soc->use_verid)

			return true;

		fallthrough;

	default:

		return false;

	}
@@ -890,6 +895,8 @@ static bool fsl_micfil_readable_reg(struct device *dev, unsigned int reg) 


static bool fsl_micfil_writeable_reg(struct device *dev, unsigned int reg)

{

	struct fsl_micfil *micfil = dev_get_drvdata(dev);



	switch (reg) {

	case REG_MICFIL_CTRL1:

	case REG_MICFIL_CTRL2:
@@ -899,7 +906,6 @@ static bool fsl_micfil_writeable_reg(struct device *dev, unsigned int reg) 
	case REG_MICFIL_DC_CTRL:

	case REG_MICFIL_OUT_CTRL:

	case REG_MICFIL_OUT_STAT:	/* Write 1 to Clear */

	case REG_MICFIL_FSYNC_CTRL:

	case REG_MICFIL_VAD0_CTRL1:

	case REG_MICFIL_VAD0_CTRL2:

	case REG_MICFIL_VAD0_STAT:	/* Write 1 to Clear */
@@ -907,6 +913,10 @@ static bool fsl_micfil_writeable_reg(struct device *dev, unsigned int reg) 
	case REG_MICFIL_VAD0_NCONFIG:

	case REG_MICFIL_VAD0_ZCD:

		return true;

	case REG_MICFIL_FSYNC_CTRL:

		if (micfil->soc->use_verid)

			return true;

		fallthrough;

	default:

		return false;

	}

sound/soc/fsl/fsl_micfil.h

+1 −1
Original line number Diff line number Diff line
@@ -72,7 +72,7 @@ 
#define MICFIL_STAT_CHXF(ch)		BIT(ch)



/* MICFIL FIFO Control Register -- REG_MICFIL_FIFO_CTRL 0x10 */

#define MICFIL_FIFO_CTRL_FIFOWMK	GENMASK(2, 0)

#define MICFIL_FIFO_CTRL_FIFOWMK	GENMASK(4, 0)



/* MICFIL FIFO Status Register -- REG_MICFIL_FIFO_STAT 0x14 */

#define MICFIL_FIFO_STAT_FIFOX_OVER(ch)	BIT(ch)