Commit b00471a5 authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvm-x86-vmx-6.9' of https://github.com/kvm-x86/linux into HEAD 

KVM VMX changes for 6.9:

 - Fix a bug where KVM would report stale/bogus exit qualification information
   when exiting to userspace due to an unexpected VM-Exit while the CPU was
   vectoring an exception.

 - Add a VMX flag in /proc/cpuinfo to report 5-level EPT support.

 - Clean up the logic for massaging the passthrough MSR bitmaps when userspace
   changes its MSR filter.
parents 41ebae2e 259720c3

arch/x86/include/asm/vmxfeatures.h

+1 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 
#define VMX_FEATURE_EPT_EXECUTE_ONLY	( 0*32+ 17) /* "ept_x_only" EPT entries can be execute only */

#define VMX_FEATURE_EPT_AD		( 0*32+ 18) /* EPT Accessed/Dirty bits */

#define VMX_FEATURE_EPT_1GB		( 0*32+ 19) /* 1GB EPT pages */

#define VMX_FEATURE_EPT_5LEVEL		( 0*32+ 20) /* 5-level EPT paging */



/* Aggregated APIC features 24-27 */

#define VMX_FEATURE_FLEXPRIORITY	( 0*32+ 24) /* TPR shadow + virt APIC */

arch/x86/kernel/cpu/feat_ctl.c

+2 −0
Original line number Diff line number Diff line
@@ -72,6 +72,8 @@ static void init_vmx_capabilities(struct cpuinfo_x86 *c) 
		c->vmx_capability[MISC_FEATURES] |= VMX_F(EPT_AD);

	if (ept & VMX_EPT_1GB_PAGE_BIT)

		c->vmx_capability[MISC_FEATURES] |= VMX_F(EPT_1GB);

	if (ept & VMX_EPT_PAGE_WALK_5_BIT)

		c->vmx_capability[MISC_FEATURES] |= VMX_F(EPT_5LEVEL);



	/* Synthetic APIC features that are aggregates of multiple features. */

	if ((c->vmx_capability[PRIMARY_CTLS] & VMX_F(VIRTUAL_TPR)) &&

arch/x86/kvm/vmx/vmx.c

+31 −41
Original line number Diff line number Diff line
@@ -161,7 +161,7 @@ module_param(allow_smaller_maxphyaddr, bool, S_IRUGO); 


/*

 * List of MSRs that can be directly passed to the guest.

 * In addition to these x2apic and PT MSRs are handled specially.

 * In addition to these x2apic, PT and LBR MSRs are handled specially.

 */

static u32 vmx_possible_passthrough_msrs[MAX_POSSIBLE_PASSTHROUGH_MSRS] = {

	MSR_IA32_SPEC_CTRL,
@@ -669,25 +669,14 @@ static inline bool cpu_need_virtualize_apic_accesses(struct kvm_vcpu *vcpu) 
	return flexpriority_enabled && lapic_in_kernel(vcpu);

}



static int possible_passthrough_msr_slot(u32 msr)

static int vmx_get_passthrough_msr_slot(u32 msr)

{

	u32 i;



	for (i = 0; i < ARRAY_SIZE(vmx_possible_passthrough_msrs); i++)

		if (vmx_possible_passthrough_msrs[i] == msr)

			return i;



	return -ENOENT;

}



static bool is_valid_passthrough_msr(u32 msr)

{

	bool r;

	int i;



	switch (msr) {

	case 0x800 ... 0x8ff:

		/* x2APIC MSRs. These are handled in vmx_update_msr_bitmap_x2apic() */

		return true;

		return -ENOENT;

	case MSR_IA32_RTIT_STATUS:

	case MSR_IA32_RTIT_OUTPUT_BASE:

	case MSR_IA32_RTIT_OUTPUT_MASK:
@@ -702,14 +691,16 @@ static bool is_valid_passthrough_msr(u32 msr) 
	case MSR_LBR_CORE_FROM ... MSR_LBR_CORE_FROM + 8:

	case MSR_LBR_CORE_TO ... MSR_LBR_CORE_TO + 8:

		/* LBR MSRs. These are handled in vmx_update_intercept_for_lbr_msrs() */

		return true;

		return -ENOENT;

	}



	r = possible_passthrough_msr_slot(msr) != -ENOENT;



	WARN(!r, "Invalid MSR %x, please adapt vmx_possible_passthrough_msrs[]", msr);

	for (i = 0; i < ARRAY_SIZE(vmx_possible_passthrough_msrs); i++) {

		if (vmx_possible_passthrough_msrs[i] == msr)

			return i;

	}



	return r;

	WARN(1, "Invalid MSR %x, please adapt vmx_possible_passthrough_msrs[]", msr);

	return -ENOENT;

}



struct vmx_uret_msr *vmx_find_uret_msr(struct vcpu_vmx *vmx, u32 msr)
@@ -3963,6 +3954,7 @@ void vmx_disable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type) 
{

	struct vcpu_vmx *vmx = to_vmx(vcpu);

	unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap;

	int idx;



	if (!cpu_has_vmx_msr_bitmap())

		return;
@@ -3973,16 +3965,13 @@ void vmx_disable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type) 
	 * Mark the desired intercept state in shadow bitmap, this is needed

	 * for resync when the MSR filters change.

	 */

	if (is_valid_passthrough_msr(msr)) {

		int idx = possible_passthrough_msr_slot(msr);



		if (idx != -ENOENT) {

	idx = vmx_get_passthrough_msr_slot(msr);

	if (idx >= 0) {

		if (type & MSR_TYPE_R)

			clear_bit(idx, vmx->shadow_msr_intercept.read);

		if (type & MSR_TYPE_W)

			clear_bit(idx, vmx->shadow_msr_intercept.write);

	}

	}



	if ((type & MSR_TYPE_R) &&

	    !kvm_msr_allowed(vcpu, msr, KVM_MSR_FILTER_READ)) {
@@ -4007,6 +3996,7 @@ void vmx_enable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type) 
{

	struct vcpu_vmx *vmx = to_vmx(vcpu);

	unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap;

	int idx;



	if (!cpu_has_vmx_msr_bitmap())

		return;
@@ -4017,16 +4007,13 @@ void vmx_enable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type) 
	 * Mark the desired intercept state in shadow bitmap, this is needed

	 * for resync when the MSR filter changes.

	 */

	if (is_valid_passthrough_msr(msr)) {

		int idx = possible_passthrough_msr_slot(msr);



		if (idx != -ENOENT) {

	idx = vmx_get_passthrough_msr_slot(msr);

	if (idx >= 0) {

		if (type & MSR_TYPE_R)

			set_bit(idx, vmx->shadow_msr_intercept.read);

		if (type & MSR_TYPE_W)

			set_bit(idx, vmx->shadow_msr_intercept.write);

	}

	}



	if (type & MSR_TYPE_R)

		vmx_set_msr_bitmap_read(msr_bitmap, msr);
@@ -4136,6 +4123,9 @@ static void vmx_msr_filter_changed(struct kvm_vcpu *vcpu) 
	struct vcpu_vmx *vmx = to_vmx(vcpu);

	u32 i;



	if (!cpu_has_vmx_msr_bitmap())

		return;



	/*

	 * Redo intercept permissions for MSRs that KVM is passing through to

	 * the guest.  Disabling interception will check the new MSR filter and
@@ -6539,7 +6529,7 @@ static int __vmx_handle_exit(struct kvm_vcpu *vcpu, fastpath_t exit_fastpath) 
		vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_DELIVERY_EV;

		vcpu->run->internal.data[0] = vectoring_info;

		vcpu->run->internal.data[1] = exit_reason.full;

		vcpu->run->internal.data[2] = vcpu->arch.exit_qualification;

		vcpu->run->internal.data[2] = vmx_get_exit_qual(vcpu);

		if (exit_reason.basic == EXIT_REASON_EPT_MISCONFIG) {

			vcpu->run->internal.data[ndata++] =

				vmcs_read64(GUEST_PHYSICAL_ADDRESS);