Commit b00bee8a authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

irqchip: Convert generic irqchip locking to guards 



Conversion was done with Coccinelle and a few manual fixups.

In a few interrupt chip callbacks this changes replaces
raw_spin_lock_irqsave() with a guard(raw_spinlock). That's intended and
correct because those interrupt chip callbacks are invoked with the
interrupt descriptor lock held and interrupts disabled. No point in using
the irqsave variant.

No functional change.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/all/20250313142524.325627746@linutronix.de
parent 9949aec6

drivers/irqchip/irq-al-fic.c

+5 −13
Original line number Diff line number Diff line
@@ -65,15 +65,13 @@ static int al_fic_irq_set_type(struct irq_data *data, unsigned int flow_type) 
	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);

	struct al_fic *fic = gc->private;

	enum al_fic_state new_state;

	int ret = 0;



	irq_gc_lock(gc);

	guard(raw_spinlock)(&gc->lock);



	if (((flow_type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_HIGH) &&

	    ((flow_type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_EDGE_RISING)) {

		pr_debug("fic doesn't support flow type %d\n", flow_type);

		ret = -EINVAL;

		goto err;

		return -EINVAL;

	}



	new_state = (flow_type & IRQ_TYPE_LEVEL_HIGH) ?
@@ -91,16 +89,10 @@ static int al_fic_irq_set_type(struct irq_data *data, unsigned int flow_type) 
	if (fic->state == AL_FIC_UNCONFIGURED) {

		al_fic_set_trigger(fic, gc, new_state);

	} else if (fic->state != new_state) {

		pr_debug("fic %s state already configured to %d\n",

			 fic->name, fic->state);

		ret = -EINVAL;

		goto err;

		pr_debug("fic %s state already configured to %d\n", fic->name, fic->state);

		return -EINVAL;

	}



err:

	irq_gc_unlock(gc);



	return ret;

	return 0;

}



static void al_fic_irq_handler(struct irq_desc *desc)

drivers/irqchip/irq-atmel-aic.c

+6 −13
Original line number Diff line number Diff line
@@ -78,9 +78,8 @@ static int aic_retrigger(struct irq_data *d) 
	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);



	/* Enable interrupt on AIC5 */

	irq_gc_lock(gc);

	guard(raw_spinlock)(&gc->lock);

	irq_reg_writel(gc, d->mask, AT91_AIC_ISCR);

	irq_gc_unlock(gc);



	return 1;

}
@@ -106,30 +105,27 @@ static void aic_suspend(struct irq_data *d) 
{

	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);



	irq_gc_lock(gc);

	guard(raw_spinlock)(&gc->lock);

	irq_reg_writel(gc, gc->mask_cache, AT91_AIC_IDCR);

	irq_reg_writel(gc, gc->wake_active, AT91_AIC_IECR);

	irq_gc_unlock(gc);

}



static void aic_resume(struct irq_data *d)

{

	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);



	irq_gc_lock(gc);

	guard(raw_spinlock)(&gc->lock);

	irq_reg_writel(gc, gc->wake_active, AT91_AIC_IDCR);

	irq_reg_writel(gc, gc->mask_cache, AT91_AIC_IECR);

	irq_gc_unlock(gc);

}



static void aic_pm_shutdown(struct irq_data *d)

{

	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);



	irq_gc_lock(gc);

	guard(raw_spinlock)(&gc->lock);

	irq_reg_writel(gc, 0xffffffff, AT91_AIC_IDCR);

	irq_reg_writel(gc, 0xffffffff, AT91_AIC_ICCR);

	irq_gc_unlock(gc);

}

#else

#define aic_suspend		NULL
@@ -175,10 +171,8 @@ static int aic_irq_domain_xlate(struct irq_domain *d, 
{

	struct irq_domain_chip_generic *dgc = d->gc;

	struct irq_chip_generic *gc;

	unsigned long flags;

	unsigned smr;

	int idx;

	int ret;

	int idx, ret;



	if (!dgc)

		return -EINVAL;
@@ -194,11 +188,10 @@ static int aic_irq_domain_xlate(struct irq_domain *d, 


	gc = dgc->gc[idx];



	irq_gc_lock_irqsave(gc, flags);

	guard(raw_spinlock_irq)(&gc->lock);

	smr = irq_reg_readl(gc, AT91_AIC_SMR(*out_hwirq));

	aic_common_set_priority(intspec[2], &smr);

	irq_reg_writel(gc, smr, AT91_AIC_SMR(*out_hwirq));

	irq_gc_unlock_irqrestore(gc, flags);



	return ret;

}

drivers/irqchip/irq-atmel-aic5.c

+8 −20
Original line number Diff line number Diff line
@@ -92,11 +92,10 @@ static void aic5_mask(struct irq_data *d) 
	 * Disable interrupt on AIC5. We always take the lock of the

	 * first irq chip as all chips share the same registers.

	 */

	irq_gc_lock(bgc);

	guard(raw_spinlock)(&bgc->lock);

	irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR);

	irq_reg_writel(gc, 1, AT91_AIC5_IDCR);

	gc->mask_cache &= ~d->mask;

	irq_gc_unlock(bgc);

}



static void aic5_unmask(struct irq_data *d)
@@ -109,11 +108,10 @@ static void aic5_unmask(struct irq_data *d) 
	 * Enable interrupt on AIC5. We always take the lock of the

	 * first irq chip as all chips share the same registers.

	 */

	irq_gc_lock(bgc);

	guard(raw_spinlock)(&bgc->lock);

	irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR);

	irq_reg_writel(gc, 1, AT91_AIC5_IECR);

	gc->mask_cache |= d->mask;

	irq_gc_unlock(bgc);

}



static int aic5_retrigger(struct irq_data *d)
@@ -122,11 +120,9 @@ static int aic5_retrigger(struct irq_data *d) 
	struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);



	/* Enable interrupt on AIC5 */

	irq_gc_lock(bgc);

	guard(raw_spinlock)(&bgc->lock);

	irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR);

	irq_reg_writel(bgc, 1, AT91_AIC5_ISCR);

	irq_gc_unlock(bgc);



	return 1;

}
@@ -137,14 +133,12 @@ static int aic5_set_type(struct irq_data *d, unsigned type) 
	unsigned int smr;

	int ret;



	irq_gc_lock(bgc);

	guard(raw_spinlock)(&bgc->lock);

	irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR);

	smr = irq_reg_readl(bgc, AT91_AIC5_SMR);

	ret = aic_common_set_type(d, type, &smr);

	if (!ret)

		irq_reg_writel(bgc, smr, AT91_AIC5_SMR);

	irq_gc_unlock(bgc);



	return ret;

}
@@ -166,7 +160,7 @@ static void aic5_suspend(struct irq_data *d) 
			smr_cache[i] = irq_reg_readl(bgc, AT91_AIC5_SMR);

		}



	irq_gc_lock(bgc);

	guard(raw_spinlock)(&bgc->lock);

	for (i = 0; i < dgc->irqs_per_chip; i++) {

		mask = 1 << i;

		if ((mask & gc->mask_cache) == (mask & gc->wake_active))
@@ -178,7 +172,6 @@ static void aic5_suspend(struct irq_data *d) 
		else

			irq_reg_writel(bgc, 1, AT91_AIC5_IDCR);

	}

	irq_gc_unlock(bgc);

}



static void aic5_resume(struct irq_data *d)
@@ -190,7 +183,7 @@ static void aic5_resume(struct irq_data *d) 
	int i;

	u32 mask;



	irq_gc_lock(bgc);

	guard(raw_spinlock)(&bgc->lock);



	if (smr_cache) {

		irq_reg_writel(bgc, 0xffffffff, AT91_AIC5_SPU);
@@ -214,7 +207,6 @@ static void aic5_resume(struct irq_data *d) 
		else

			irq_reg_writel(bgc, 1, AT91_AIC5_IDCR);

	}

	irq_gc_unlock(bgc);

}



static void aic5_pm_shutdown(struct irq_data *d)
@@ -225,13 +217,12 @@ static void aic5_pm_shutdown(struct irq_data *d) 
	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);

	int i;



	irq_gc_lock(bgc);

	guard(raw_spinlock)(&bgc->lock);

	for (i = 0; i < dgc->irqs_per_chip; i++) {

		irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR);

		irq_reg_writel(bgc, 1, AT91_AIC5_IDCR);

		irq_reg_writel(bgc, 1, AT91_AIC5_ICCR);

	}

	irq_gc_unlock(bgc);

}

#else

#define aic5_suspend		NULL
@@ -277,7 +268,6 @@ static int aic5_irq_domain_xlate(struct irq_domain *d, 
				 unsigned int *out_type)

{

	struct irq_chip_generic *bgc = irq_get_domain_generic_chip(d, 0);

	unsigned long flags;

	unsigned smr;

	int ret;
@@ -289,13 +279,11 @@ static int aic5_irq_domain_xlate(struct irq_domain *d, 
	if (ret)

		return ret;



	irq_gc_lock_irqsave(bgc, flags);

	guard(raw_spinlock_irq)(&bgc->lock);

	irq_reg_writel(bgc, *out_hwirq, AT91_AIC5_SSR);

	smr = irq_reg_readl(bgc, AT91_AIC5_SMR);

	aic_common_set_priority(intspec[2], &smr);

	irq_reg_writel(bgc, smr, AT91_AIC5_SMR);

	irq_gc_unlock_irqrestore(bgc, flags);



	return ret;

}

drivers/irqchip/irq-bcm7120-l2.c

+9 −13
Original line number Diff line number Diff line
@@ -63,16 +63,15 @@ static void bcm7120_l2_intc_irq_handle(struct irq_desc *desc) 


	for (idx = 0; idx < b->n_words; idx++) {

		int base = idx * IRQS_PER_WORD;

		struct irq_chip_generic *gc =

			irq_get_domain_generic_chip(b->domain, base);

		struct irq_chip_generic *gc;

		unsigned long pending;

		int hwirq;



		irq_gc_lock(gc);

		pending = irq_reg_readl(gc, b->stat_offset[idx]) &

					    gc->mask_cache &

		gc = irq_get_domain_generic_chip(b->domain, base);

		scoped_guard (raw_spinlock, &gc->lock) {

			pending = irq_reg_readl(gc, b->stat_offset[idx]) & gc->mask_cache &

				data->irq_map_mask[idx];

		irq_gc_unlock(gc);

		}



		for_each_set_bit(hwirq, &pending, IRQS_PER_WORD)

			generic_handle_domain_irq(b->domain, base + hwirq);
@@ -86,11 +85,9 @@ static void bcm7120_l2_intc_suspend(struct irq_chip_generic *gc) 
	struct bcm7120_l2_intc_data *b = gc->private;

	struct irq_chip_type *ct = gc->chip_types;



	irq_gc_lock(gc);

	guard(raw_spinlock)(&gc->lock);

	if (b->can_wake)

		irq_reg_writel(gc, gc->mask_cache | gc->wake_active,

			       ct->regs.mask);

	irq_gc_unlock(gc);

		irq_reg_writel(gc, gc->mask_cache | gc->wake_active, ct->regs.mask);

}



static void bcm7120_l2_intc_resume(struct irq_chip_generic *gc)
@@ -98,9 +95,8 @@ static void bcm7120_l2_intc_resume(struct irq_chip_generic *gc) 
	struct irq_chip_type *ct = gc->chip_types;



	/* Restore the saved mask */

	irq_gc_lock(gc);

	guard(raw_spinlock)(&gc->lock);

	irq_reg_writel(gc, gc->mask_cache, ct->regs.mask);

	irq_gc_unlock(gc);

}



static int bcm7120_l2_intc_init_one(struct device_node *dn,

drivers/irqchip/irq-brcmstb-l2.c

+2 −6
Original line number Diff line number Diff line
@@ -97,9 +97,8 @@ static void __brcmstb_l2_intc_suspend(struct irq_data *d, bool save) 
	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);

	struct irq_chip_type *ct = irq_data_get_chip_type(d);

	struct brcmstb_l2_intc_data *b = gc->private;

	unsigned long flags;



	irq_gc_lock_irqsave(gc, flags);

	guard(raw_spinlock_irqsave)(&gc->lock);

	/* Save the current mask */

	if (save)

		b->saved_mask = irq_reg_readl(gc, ct->regs.mask);
@@ -109,7 +108,6 @@ static void __brcmstb_l2_intc_suspend(struct irq_data *d, bool save) 
		irq_reg_writel(gc, ~gc->wake_active, ct->regs.disable);

		irq_reg_writel(gc, gc->wake_active, ct->regs.enable);

	}

	irq_gc_unlock_irqrestore(gc, flags);

}



static void brcmstb_l2_intc_shutdown(struct irq_data *d)
@@ -127,9 +125,8 @@ static void brcmstb_l2_intc_resume(struct irq_data *d) 
	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);

	struct irq_chip_type *ct = irq_data_get_chip_type(d);

	struct brcmstb_l2_intc_data *b = gc->private;

	unsigned long flags;



	irq_gc_lock_irqsave(gc, flags);

	guard(raw_spinlock_irqsave)(&gc->lock);

	if (ct->chip.irq_ack) {

		/* Clear unmasked non-wakeup interrupts */

		irq_reg_writel(gc, ~b->saved_mask & ~gc->wake_active,
@@ -139,7 +136,6 @@ static void brcmstb_l2_intc_resume(struct irq_data *d) 
	/* Restore the saved mask */

	irq_reg_writel(gc, b->saved_mask, ct->regs.disable);

	irq_reg_writel(gc, ~b->saved_mask, ct->regs.enable);

	irq_gc_unlock_irqrestore(gc, flags);

}



static int __init brcmstb_l2_intc_of_init(struct device_node *np,