Commit b02dc185 authored by Chang S. Bae's avatar Chang S. Bae Committed by Ingo Molnar
Browse files

x86/cpufeatures: Add X86_FEATURE_APX 



Intel Advanced Performance Extensions (APX) introduce a new set of
general-purpose registers, managed as an extended state component via the
xstate management facility.

Before enabling this new xstate, define a feature flag to clarify the
dependency in xsave_cpuid_features[]. APX is enumerated under CPUID level
7 with EDX=1. Since this CPUID leaf is not yet allocated, place the flag
in a scattered feature word.

While this feature is intended only for userspace, exposing it via
/proc/cpuinfo is unnecessary. Instead, the existing arch_prctl(2)
mechanism with the ARCH_GET_XCOMP_SUPP option can be used to query the
feature availability.

Finally, clarify that APX depends on XSAVE.

Signed-off-by: default avatarChang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Reviewed-by: default avatarSohil Mehta <sohil.mehta@intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Link: https://lore.kernel.org/r/20250416021720.12305-2-chang.seok.bae@intel.com
parent 4e254750

arch/x86/include/asm/cpufeatures.h

+1 −0
Original line number Diff line number Diff line
@@ -481,6 +481,7 @@ 
#define X86_FEATURE_AMD_HTR_CORES	(21*32+ 6) /* Heterogeneous Core Topology */

#define X86_FEATURE_AMD_WORKLOAD_CLASS	(21*32+ 7) /* Workload Classification */

#define X86_FEATURE_PREFER_YMM		(21*32+ 8) /* Avoid ZMM registers due to downclocking */

#define X86_FEATURE_APX			(21*32+ 9) /* Advanced Performance Extensions */



/*

 * BUG word(s)

arch/x86/kernel/cpu/cpuid-deps.c

+1 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ static const struct cpuid_dep cpuid_deps[] = { 
	{ X86_FEATURE_PKU,			X86_FEATURE_XSAVE     },

	{ X86_FEATURE_MPX,			X86_FEATURE_XSAVE     },

	{ X86_FEATURE_XGETBV1,			X86_FEATURE_XSAVE     },

	{ X86_FEATURE_APX,			X86_FEATURE_XSAVE     },

	{ X86_FEATURE_CMOV,			X86_FEATURE_FXSR      },

	{ X86_FEATURE_MMX,			X86_FEATURE_FXSR      },

	{ X86_FEATURE_MMXEXT,			X86_FEATURE_MMX       },

arch/x86/kernel/cpu/scattered.c

+1 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ static const struct cpuid_bit cpuid_bits[] = { 
	{ X86_FEATURE_APERFMPERF,		CPUID_ECX,  0, 0x00000006, 0 },

	{ X86_FEATURE_EPB,			CPUID_ECX,  3, 0x00000006, 0 },

	{ X86_FEATURE_INTEL_PPIN,		CPUID_EBX,  0, 0x00000007, 1 },

	{ X86_FEATURE_APX,			CPUID_EDX, 21, 0x00000007, 1 },

	{ X86_FEATURE_RRSBA_CTRL,		CPUID_EDX,  2, 0x00000007, 2 },

	{ X86_FEATURE_BHI_CTRL,			CPUID_EDX,  4, 0x00000007, 2 },

	{ X86_FEATURE_CQM_LLC,			CPUID_EDX,  1, 0x0000000f, 0 },