Commit b076b995 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
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clk: qcom: Add SM6115 LPASSCC



SM6115 (and its derivatives or similar SoCs) has an LPASS clock
controller block which provides audio-related resets.

Add the required code to support them.

[alexey.klimov] fixed compilation errors after rebase,
slightly changed the commit message

Cc: Konrad Dybcio <konradybcio@kernel.org>
Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarAlexey Klimov <alexey.klimov@linaro.org>
Link: https://lore.kernel.org/r/20241212002551.2902954-3-alexey.klimov@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 030de8ea
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+9 −0
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@@ -1278,6 +1278,15 @@ config SM_GPUCC_8650
	  Say Y if you want to support graphics controller devices and
	  functionality such as 3D graphics.

config SM_LPASSCC_6115
	tristate "SM6115 Low Power Audio Subsystem (LPASS) Clock Controller"
	depends on ARM64 || COMPILE_TEST
	select SM_GCC_6115
	help
	  Support for the LPASS clock controller on SM6115 devices.
	  Say Y if you want to toggle LPASS-adjacent resets within
	  this clock controller to reset the LPASS subsystem.

config SM_TCSRCC_8550
	tristate "SM8550 TCSR Clock Controller"
	depends on ARM64 || COMPILE_TEST
+1 −0
Original line number Diff line number Diff line
@@ -159,6 +159,7 @@ obj-$(CONFIG_SM_GPUCC_8350) += gpucc-sm8350.o
obj-$(CONFIG_SM_GPUCC_8450) += gpucc-sm8450.o
obj-$(CONFIG_SM_GPUCC_8550) += gpucc-sm8550.o
obj-$(CONFIG_SM_GPUCC_8650) += gpucc-sm8650.o
obj-$(CONFIG_SM_LPASSCC_6115) += lpasscc-sm6115.o
obj-$(CONFIG_SM_TCSRCC_8550) += tcsrcc-sm8550.o
obj-$(CONFIG_SM_TCSRCC_8650) += tcsrcc-sm8650.o
obj-$(CONFIG_SM_TCSRCC_8750) += tcsrcc-sm8750.o
+85 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2022, 2023 Linaro Limited
 */

#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>

#include <dt-bindings/clock/qcom,sm6115-lpasscc.h>

#include "common.h"
#include "reset.h"

static const struct qcom_reset_map lpass_audiocc_sm6115_resets[] = {
	[LPASS_AUDIO_SWR_RX_CGCR] =  { .reg = 0x98, .bit = 1, .udelay = 500 },
};

static struct regmap_config lpass_audiocc_sm6115_regmap_config = {
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
	.name = "lpass-audio-csr",
	.max_register = 0x1000,
};

static const struct qcom_cc_desc lpass_audiocc_sm6115_reset_desc = {
	.config = &lpass_audiocc_sm6115_regmap_config,
	.resets = lpass_audiocc_sm6115_resets,
	.num_resets = ARRAY_SIZE(lpass_audiocc_sm6115_resets),
};

static const struct qcom_reset_map lpasscc_sm6115_resets[] = {
	[LPASS_SWR_TX_CONFIG_CGCR] = { .reg = 0x100, .bit = 1, .udelay = 500 },
};

static struct regmap_config lpasscc_sm6115_regmap_config = {
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
	.name = "lpass-tcsr",
	.max_register = 0x1000,
};

static const struct qcom_cc_desc lpasscc_sm6115_reset_desc = {
	.config = &lpasscc_sm6115_regmap_config,
	.resets = lpasscc_sm6115_resets,
	.num_resets = ARRAY_SIZE(lpasscc_sm6115_resets),
};

static const struct of_device_id lpasscc_sm6115_match_table[] = {
	{
		.compatible = "qcom,sm6115-lpassaudiocc",
		.data = &lpass_audiocc_sm6115_reset_desc,
	}, {
		.compatible = "qcom,sm6115-lpasscc",
		.data = &lpasscc_sm6115_reset_desc,
	},
	{ },
};
MODULE_DEVICE_TABLE(of, lpasscc_sm6115_match_table);

static int lpasscc_sm6115_probe(struct platform_device *pdev)
{
	const struct qcom_cc_desc *desc = of_device_get_match_data(&pdev->dev);

	return qcom_cc_probe_by_index(pdev, 0, desc);
}

static struct platform_driver lpasscc_sm6115_driver = {
	.probe = lpasscc_sm6115_probe,
	.driver = {
		.name = "lpasscc-sm6115",
		.of_match_table = lpasscc_sm6115_match_table,
	},
};

module_platform_driver(lpasscc_sm6115_driver);

MODULE_DESCRIPTION("QTI LPASSCC SM6115 Driver");
MODULE_LICENSE("GPL");