Commit b0a4dba7 authored by Jouni Högander's avatar Jouni Högander Committed by Joonas Lahtinen
Browse files

drm/i915/psr: Disable PSR on update_m_n and update_lrr 

PSR/PR parameters might change based on update_m_n or update_lrr. Disable
on update_m_n and update_lrr to ensure proper parameters are taken into use
on next PSR enable in intel_psr_post_plane_update.

Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15771


Fixes: 2bc98c6f ("drm/i915/alpm: Compute ALPM parameters into crtc_state->alpm_state")
Cc: <stable@vger.kernel.org> # v6.19+
Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarSuraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312083710.1593781-2-jouni.hogander@intel.com


(cherry picked from commit 65852b56)
Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
parent ac57eb3b

drivers/gpu/drm/i915/display/intel_psr.c

+2 −0
Original line number Diff line number Diff line
@@ -3109,6 +3109,8 @@ void intel_psr_pre_plane_update(struct intel_atomic_state *state, 
			 * - Display WA #1136: skl, bxt

			 */

			if (intel_crtc_needs_modeset(new_crtc_state) ||

			    new_crtc_state->update_m_n ||

			    new_crtc_state->update_lrr ||

			    !new_crtc_state->has_psr ||

			    !new_crtc_state->active_planes ||

			    new_crtc_state->has_sel_update != psr->sel_update_enabled ||