Commit b0e0290b authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson
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arm64: dts: qcom: qdu1000: correct LLCC reg entries 



According to bindings and Linux driver there is no
"multi_channel_register" address space for LLCC.  The first "reg" entry
is supposed to be llcc0_base since commit 43aa006e ("dt-bindings:
arm: msm: Fix register regions used for LLCC banks"):

  qdu1000-idp.dtb: system-cache-controller@19200000: reg: [[0, 421527552, 0, 14155776], [0, 438304768, 0, 524288], [0, 572293416, 0, 4]] is too long
  qdu1000-idp.dtb: system-cache-controller@19200000: reg-names:0: 'llcc0_base' was expected
  qdu1000-idp.dtb: system-cache-controller@19200000: reg-names: ['llcc_base', 'llcc_broadcast_base', 'multi_channel_register'] is too long

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: default avatarMukesh Ojha <quic_mojha@quicinc.com>
Link: https://lore.kernel.org/r/20231107080417.16700-1-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 11fcb813

arch/arm64/boot/dts/qcom/qdu1000.dtsi

+3 −5
Original line number Diff line number Diff line
@@ -1446,11 +1446,9 @@ gem_noc: interconnect@19100000 { 
		system-cache-controller@19200000 {

			compatible = "qcom,qdu1000-llcc";

			reg = <0 0x19200000 0 0xd80000>,

			      <0 0x1a200000 0 0x80000>,

			      <0 0x221c8128 0 0x4>;

			reg-names = "llcc_base",

				    "llcc_broadcast_base",

				    "multi_channel_register";

			      <0 0x1a200000 0 0x80000>;

			reg-names = "llcc0_base",

				    "llcc_broadcast_base";

			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;

			multi-ch-bit-off = <24 2>;

		};