Commit b0f90a86 authored by SkyLake.Huang's avatar SkyLake.Huang Committed by Andrew Lunn
Browse files

net: phy: mediatek-ge-soc: Shrink line wrapping to 80 characters 



This patch shrinks line wrapping to 80 chars. Also, in
tx_amp_fill_result(), use FIELD_PREP() to prettify code.

Signed-off-by: default avatarSkyLake.Huang <skylake.huang@mediatek.com>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
parent b544223b

drivers/net/phy/mediatek-ge-soc.c

+88 −37
Original line number Diff line number Diff line
@@ -342,7 +342,8 @@ static int cal_cycle(struct phy_device *phydev, int devad, 
	ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,

					MTK_PHY_RG_AD_CAL_CLK, reg_val,

					reg_val & MTK_PHY_DA_CAL_CLK, 500,

					ANALOG_INTERNAL_OPERATION_MAX_US, false);

					ANALOG_INTERNAL_OPERATION_MAX_US,

					false);

	if (ret) {

		phydev_err(phydev, "Calibration cycle timeout\n");

		return ret;
@@ -441,40 +442,72 @@ static int tx_amp_fill_result(struct phy_device *phydev, u16 *buf) 
	}



	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TXVLD_DA_RG,

		       MTK_PHY_DA_TX_I2MPB_A_GBE_MASK, (buf[0] + bias[0]) << 10);

		       MTK_PHY_DA_TX_I2MPB_A_GBE_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_A_GBE_MASK,

				  buf[0] + bias[0]));

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TXVLD_DA_RG,

		       MTK_PHY_DA_TX_I2MPB_A_TBT_MASK, buf[0] + bias[1]);

		       MTK_PHY_DA_TX_I2MPB_A_TBT_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_A_TBT_MASK,

				  buf[0] + bias[1]));

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_A2,

		       MTK_PHY_DA_TX_I2MPB_A_HBT_MASK, (buf[0] + bias[2]) << 10);

		       MTK_PHY_DA_TX_I2MPB_A_HBT_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_A_HBT_MASK,

				  buf[0] + bias[2]));

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_A2,

		       MTK_PHY_DA_TX_I2MPB_A_TST_MASK, buf[0] + bias[3]);

		       MTK_PHY_DA_TX_I2MPB_A_TST_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_A_TST_MASK,

				  buf[0] + bias[3]));



	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_B1,

		       MTK_PHY_DA_TX_I2MPB_B_GBE_MASK, (buf[1] + bias[4]) << 8);

		       MTK_PHY_DA_TX_I2MPB_B_GBE_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_B_GBE_MASK,

				  buf[1] + bias[4]));

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_B1,

		       MTK_PHY_DA_TX_I2MPB_B_TBT_MASK, buf[1] + bias[5]);

		       MTK_PHY_DA_TX_I2MPB_B_TBT_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_B_TBT_MASK,

				  buf[1] + bias[5]));

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_B2,

		       MTK_PHY_DA_TX_I2MPB_B_HBT_MASK, (buf[1] + bias[6]) << 8);

		       MTK_PHY_DA_TX_I2MPB_B_HBT_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_B_HBT_MASK,

				  buf[1] + bias[6]));

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_B2,

		       MTK_PHY_DA_TX_I2MPB_B_TST_MASK, buf[1] + bias[7]);

		       MTK_PHY_DA_TX_I2MPB_B_TST_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_B_TST_MASK,

				  buf[1] + bias[7]));



	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_C1,

		       MTK_PHY_DA_TX_I2MPB_C_GBE_MASK, (buf[2] + bias[8]) << 8);

		       MTK_PHY_DA_TX_I2MPB_C_GBE_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_C_GBE_MASK,

				  buf[2] + bias[8]));

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_C1,

		       MTK_PHY_DA_TX_I2MPB_C_TBT_MASK, buf[2] + bias[9]);

		       MTK_PHY_DA_TX_I2MPB_C_TBT_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_C_TBT_MASK,

				  buf[2] + bias[9]));

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_C2,

		       MTK_PHY_DA_TX_I2MPB_C_HBT_MASK, (buf[2] + bias[10]) << 8);

		       MTK_PHY_DA_TX_I2MPB_C_HBT_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_C_HBT_MASK,

				  buf[2] + bias[10]));

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_C2,

		       MTK_PHY_DA_TX_I2MPB_C_TST_MASK, buf[2] + bias[11]);

		       MTK_PHY_DA_TX_I2MPB_C_TST_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_C_TST_MASK,

				  buf[2] + bias[11]));



	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_D1,

		       MTK_PHY_DA_TX_I2MPB_D_GBE_MASK, (buf[3] + bias[12]) << 8);

		       MTK_PHY_DA_TX_I2MPB_D_GBE_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_D_GBE_MASK,

				  buf[3] + bias[12]));

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_D1,

		       MTK_PHY_DA_TX_I2MPB_D_TBT_MASK, buf[3] + bias[13]);

		       MTK_PHY_DA_TX_I2MPB_D_TBT_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_D_TBT_MASK,

				  buf[3] + bias[13]));

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_D2,

		       MTK_PHY_DA_TX_I2MPB_D_HBT_MASK, (buf[3] + bias[14]) << 8);

		       MTK_PHY_DA_TX_I2MPB_D_HBT_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_D_HBT_MASK,

				  buf[3] + bias[14]));

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_D2,

		       MTK_PHY_DA_TX_I2MPB_D_TST_MASK, buf[3] + bias[15]);

		       MTK_PHY_DA_TX_I2MPB_D_TST_MASK,

		       FIELD_PREP(MTK_PHY_DA_TX_I2MPB_D_TST_MASK,

				  buf[3] + bias[15]));



	return 0;

}
@@ -663,7 +696,8 @@ static int tx_vcm_cal_sw(struct phy_device *phydev, u8 rg_txreserve_x) 
		goto restore;



	/* We calibrate TX-VCM in different logic. Check upper index and then

	 * lower index. If this calibration is valid, apply lower index's result.

	 * lower index. If this calibration is valid, apply lower index's

	 * result.

	 */

	ret = upper_ret - lower_ret;

	if (ret == 1) {
@@ -692,7 +726,8 @@ static int tx_vcm_cal_sw(struct phy_device *phydev, u8 rg_txreserve_x) 
	} else if (upper_idx == TXRESERVE_MAX && upper_ret == 0 &&

		   lower_ret == 0) {

		ret = 0;

		phydev_warn(phydev, "TX-VCM SW cal result at high margin 0x%x\n",

		phydev_warn(phydev,

			    "TX-VCM SW cal result at high margin 0x%x\n",

			    upper_idx);

	} else {

		ret = -EINVAL;
@@ -796,7 +831,8 @@ static void mt7981_phy_finetune(struct phy_device *phydev) 


	/* TR_OPEN_LOOP_EN = 1, lpf_x_average = 9 */

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG234,

		       MTK_PHY_TR_OPEN_LOOP_EN_MASK | MTK_PHY_LPF_X_AVERAGE_MASK,

		       MTK_PHY_TR_OPEN_LOOP_EN_MASK |

		       MTK_PHY_LPF_X_AVERAGE_MASK,

		       BIT(0) | FIELD_PREP(MTK_PHY_LPF_X_AVERAGE_MASK, 0x9));



	/* rg_tr_lpf_cnt_val = 512 */
@@ -865,7 +901,8 @@ static void mt7988_phy_finetune(struct phy_device *phydev) 


	/* TR_OPEN_LOOP_EN = 1, lpf_x_average = 10 */

	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG234,

		       MTK_PHY_TR_OPEN_LOOP_EN_MASK | MTK_PHY_LPF_X_AVERAGE_MASK,

		       MTK_PHY_TR_OPEN_LOOP_EN_MASK |

		       MTK_PHY_LPF_X_AVERAGE_MASK,

		       BIT(0) | FIELD_PREP(MTK_PHY_LPF_X_AVERAGE_MASK, 0xa));



	/* rg_tr_lpf_cnt_val = 1023 */
@@ -977,7 +1014,8 @@ static void mt798x_phy_eee(struct phy_device *phydev) 
	phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);



	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_3);

	__phy_modify(phydev, MTK_PHY_LPI_REG_14, MTK_PHY_LPI_WAKE_TIMER_1000_MASK,

	__phy_modify(phydev, MTK_PHY_LPI_REG_14,

		     MTK_PHY_LPI_WAKE_TIMER_1000_MASK,

		     FIELD_PREP(MTK_PHY_LPI_WAKE_TIMER_1000_MASK, 0x19c));



	__phy_modify(phydev, MTK_PHY_LPI_REG_1c, MTK_PHY_SMI_DET_ON_THRESH_MASK,
@@ -987,7 +1025,8 @@ static void mt798x_phy_eee(struct phy_device *phydev) 
	phy_modify_mmd(phydev, MDIO_MMD_VEND1,

		       MTK_PHY_RG_LPI_PCS_DSP_CTRL_REG122,

		       MTK_PHY_LPI_NORM_MSE_HI_THRESH1000_MASK,

		       FIELD_PREP(MTK_PHY_LPI_NORM_MSE_HI_THRESH1000_MASK, 0xff));

		       FIELD_PREP(MTK_PHY_LPI_NORM_MSE_HI_THRESH1000_MASK,

				  0xff));

}



static int cal_sw(struct phy_device *phydev, enum CAL_ITEM cal_item,
@@ -1147,7 +1186,8 @@ static int mt798x_phy_hw_led_on_set(struct phy_device *phydev, u8 index, 
					(index ? 16 : 0), &priv->led_state);

	if (changed)

		return phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ?

				      MTK_PHY_LED1_ON_CTRL : MTK_PHY_LED0_ON_CTRL,

				      MTK_PHY_LED1_ON_CTRL :

				      MTK_PHY_LED0_ON_CTRL,

				      MTK_PHY_LED_ON_MASK,

				      on ? MTK_PHY_LED_ON_FORCE_ON : 0);

	else
@@ -1157,7 +1197,8 @@ static int mt798x_phy_hw_led_on_set(struct phy_device *phydev, u8 index, 
static int mt798x_phy_hw_led_blink_set(struct phy_device *phydev, u8 index,

				       bool blinking)

{

	unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK + (index ? 16 : 0);

	unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK +

				 (index ? 16 : 0);

	struct mtk_socphy_priv *priv = phydev->priv;

	bool changed;
@@ -1170,8 +1211,10 @@ static int mt798x_phy_hw_led_blink_set(struct phy_device *phydev, u8 index, 
			      (index ? 16 : 0), &priv->led_state);

	if (changed)

		return phy_write_mmd(phydev, MDIO_MMD_VEND2, index ?

				     MTK_PHY_LED1_BLINK_CTRL : MTK_PHY_LED0_BLINK_CTRL,

				     blinking ? MTK_PHY_LED_BLINK_FORCE_BLINK : 0);

				     MTK_PHY_LED1_BLINK_CTRL :

				     MTK_PHY_LED0_BLINK_CTRL,

				     blinking ?

				     MTK_PHY_LED_BLINK_FORCE_BLINK : 0);

	else

		return 0;

}
@@ -1237,7 +1280,8 @@ static int mt798x_phy_led_hw_is_supported(struct phy_device *phydev, u8 index, 
static int mt798x_phy_led_hw_control_get(struct phy_device *phydev, u8 index,

					 unsigned long *rules)

{

	unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK + (index ? 16 : 0);

	unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK +

				 (index ? 16 : 0);

	unsigned int bit_netdev = MTK_PHY_LED_STATE_NETDEV + (index ? 16 : 0);

	unsigned int bit_on = MTK_PHY_LED_STATE_FORCE_ON + (index ? 16 : 0);

	struct mtk_socphy_priv *priv = phydev->priv;
@@ -1258,8 +1302,8 @@ static int mt798x_phy_led_hw_control_get(struct phy_device *phydev, u8 index, 
	if (blink < 0)

		return -EIO;



	if ((on & (MTK_PHY_LED_ON_LINK | MTK_PHY_LED_ON_FDX | MTK_PHY_LED_ON_HDX |

		   MTK_PHY_LED_ON_LINKDOWN)) ||

	if ((on & (MTK_PHY_LED_ON_LINK | MTK_PHY_LED_ON_FDX |

		   MTK_PHY_LED_ON_HDX | MTK_PHY_LED_ON_LINKDOWN)) ||

	    (blink & (MTK_PHY_LED_BLINK_RX | MTK_PHY_LED_BLINK_TX)))

		set_bit(bit_netdev, &priv->led_state);

	else
@@ -1333,17 +1377,23 @@ static int mt798x_phy_led_hw_control_set(struct phy_device *phydev, u8 index, 


	if (rules & BIT(TRIGGER_NETDEV_RX)) {

		blink |= (on & MTK_PHY_LED_ON_LINK) ?

			  (((on & MTK_PHY_LED_ON_LINK10) ? MTK_PHY_LED_BLINK_10RX : 0) |

			   ((on & MTK_PHY_LED_ON_LINK100) ? MTK_PHY_LED_BLINK_100RX : 0) |

			   ((on & MTK_PHY_LED_ON_LINK1000) ? MTK_PHY_LED_BLINK_1000RX : 0)) :

			  (((on & MTK_PHY_LED_ON_LINK10) ?

			    MTK_PHY_LED_BLINK_10RX : 0) |

			   ((on & MTK_PHY_LED_ON_LINK100) ?

			    MTK_PHY_LED_BLINK_100RX : 0) |

			   ((on & MTK_PHY_LED_ON_LINK1000) ?

			    MTK_PHY_LED_BLINK_1000RX : 0)) :

			  MTK_PHY_LED_BLINK_RX;

	}



	if (rules & BIT(TRIGGER_NETDEV_TX)) {

		blink |= (on & MTK_PHY_LED_ON_LINK) ?

			  (((on & MTK_PHY_LED_ON_LINK10) ? MTK_PHY_LED_BLINK_10TX : 0) |

			   ((on & MTK_PHY_LED_ON_LINK100) ? MTK_PHY_LED_BLINK_100TX : 0) |

			   ((on & MTK_PHY_LED_ON_LINK1000) ? MTK_PHY_LED_BLINK_1000TX : 0)) :

			  (((on & MTK_PHY_LED_ON_LINK10) ?

			    MTK_PHY_LED_BLINK_10TX : 0) |

			   ((on & MTK_PHY_LED_ON_LINK100) ?

			    MTK_PHY_LED_BLINK_100TX : 0) |

			   ((on & MTK_PHY_LED_ON_LINK1000) ?

			    MTK_PHY_LED_BLINK_1000TX : 0)) :

			  MTK_PHY_LED_BLINK_TX;

	}
@@ -1400,7 +1450,8 @@ static int mt7988_phy_fix_leds_polarities(struct phy_device *phydev) 
	/* Only now setup pinctrl to avoid bogus blinking */

	pinctrl = devm_pinctrl_get_select(&phydev->mdio.dev, "gbe-led");

	if (IS_ERR(pinctrl))

		dev_err(&phydev->mdio.bus->dev, "Failed to setup PHY LED pinctrl\n");

		dev_err(&phydev->mdio.bus->dev,

			"Failed to setup PHY LED pinctrl\n");



	return 0;

}