Commit b1075ae1 authored by Karunika Choo's avatar Karunika Choo Committed by Boris Brezillon
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drm/panthor: Add arch-specific panthor_hw binding



This patch adds the framework for binding to a specific panthor_hw
structure based on the architecture major value parsed from the GPU_ID
register. This is in preparation of enabling architecture-specific
behaviours based on GPU_ID. As such, it also splits the GPU_ID register
read operation into its own helper function.

This framework allows a single panthor_hw structure to be shared across
multiple architectures should there be minimal changes between them via
the arch_min and arch_max field of the panthor_hw_entry structure,
instead of duplicating the structure across multiple architectures.

Reviewed-by: default avatarSteven Price <steven.price@arm.com>
Signed-off-by: default avatarKarunika Choo <karunika.choo@arm.com>
Link: https://patch.msgid.link/20251125125548.3282320-2-karunika.choo@arm.com


Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
parent ce04ec03
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+4 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ struct panthor_device;
struct panthor_gpu;
struct panthor_group_pool;
struct panthor_heap_pool;
struct panthor_hw;
struct panthor_job;
struct panthor_mmu;
struct panthor_fw;
@@ -134,6 +135,9 @@ struct panthor_device {
	/** @csif_info: Command stream interface information. */
	struct drm_panthor_csif_info csif_info;

	/** @hw: GPU-specific data. */
	struct panthor_hw *hw;

	/** @gpu: GPU management data. */
	struct panthor_gpu *gpu;

+64 −1
Original line number Diff line number Diff line
@@ -10,6 +10,28 @@
#define GPU_PROD_ID_MAKE(arch_major, prod_major) \
	(((arch_major) << 24) | (prod_major))

/** struct panthor_hw_entry - HW arch major to panthor_hw binding entry */
struct panthor_hw_entry {
	/** @arch_min: Minimum supported architecture major value (inclusive) */
	u8 arch_min;

	/** @arch_max: Maximum supported architecture major value (inclusive) */
	u8 arch_max;

	/** @hwdev: Pointer to panthor_hw structure */
	struct panthor_hw *hwdev;
};

static struct panthor_hw panthor_hw_arch_v10 = {};

static struct panthor_hw_entry panthor_hw_match[] = {
	{
		.arch_min = 10,
		.arch_max = 13,
		.hwdev = &panthor_hw_arch_v10,
	},
};

static char *get_gpu_model_name(struct panthor_device *ptdev)
{
	const u32 gpu_id = ptdev->gpu_info.gpu_id;
@@ -64,7 +86,6 @@ static void panthor_gpu_info_init(struct panthor_device *ptdev)
{
	unsigned int i;

	ptdev->gpu_info.gpu_id = gpu_read(ptdev, GPU_ID);
	ptdev->gpu_info.csf_id = gpu_read(ptdev, GPU_CSF_ID);
	ptdev->gpu_info.gpu_rev = gpu_read(ptdev, GPU_REVID);
	ptdev->gpu_info.core_features = gpu_read(ptdev, GPU_CORE_FEATURES);
@@ -119,8 +140,50 @@ static void panthor_hw_info_init(struct panthor_device *ptdev)
		 ptdev->gpu_info.tiler_present);
}

static int panthor_hw_bind_device(struct panthor_device *ptdev)
{
	struct panthor_hw *hdev = NULL;
	const u32 arch_major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id);
	int i = 0;

	for (i = 0; i < ARRAY_SIZE(panthor_hw_match); i++) {
		struct panthor_hw_entry *entry = &panthor_hw_match[i];

		if (arch_major >= entry->arch_min && arch_major <= entry->arch_max) {
			hdev = entry->hwdev;
			break;
		}
	}

	if (!hdev)
		return -EOPNOTSUPP;

	ptdev->hw = hdev;

	return 0;
}

static int panthor_hw_gpu_id_init(struct panthor_device *ptdev)
{
	ptdev->gpu_info.gpu_id = gpu_read(ptdev, GPU_ID);
	if (!ptdev->gpu_info.gpu_id)
		return -ENXIO;

	return 0;
}

int panthor_hw_init(struct panthor_device *ptdev)
{
	int ret = 0;

	ret = panthor_hw_gpu_id_init(ptdev);
	if (ret)
		return ret;

	ret = panthor_hw_bind_device(ptdev);
	if (ret)
		return ret;

	panthor_hw_info_init(ptdev);

	return 0;
+6 −0
Original line number Diff line number Diff line
@@ -6,6 +6,12 @@

struct panthor_device;

/**
 * struct panthor_hw - GPU specific register mapping and functions
 */
struct panthor_hw {
};

int panthor_hw_init(struct panthor_device *ptdev);

#endif /* __PANTHOR_HW_H__ */