Commit b15dfdac authored by Huacai Chen's avatar Huacai Chen
Browse files

LoongArch: Adjust misc routines for 32BIT/64BIT 



Adjust misc routines for both 32BIT and 64BIT, including: bitops, bswap,
checksum, string, jump label, unaligned access emulator, suspend/wakeup
routines, etc.

Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarJiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent 48c72947

arch/loongarch/include/asm/bitops.h

+11 −0
Original line number Diff line number Diff line
@@ -13,11 +13,22 @@ 


#include <asm/barrier.h>



#ifdef CONFIG_32BIT_REDUCED



#include <asm-generic/bitops/ffs.h>

#include <asm-generic/bitops/fls.h>

#include <asm-generic/bitops/__ffs.h>

#include <asm-generic/bitops/__fls.h>



#else /* CONFIG_32BIT_STANDARD || CONFIG_64BIT  */



#include <asm-generic/bitops/builtin-ffs.h>

#include <asm-generic/bitops/builtin-fls.h>

#include <asm-generic/bitops/builtin-__ffs.h>

#include <asm-generic/bitops/builtin-__fls.h>



#endif



#include <asm-generic/bitops/ffz.h>

#include <asm-generic/bitops/fls64.h>

arch/loongarch/include/asm/checksum.h

+4 −0
Original line number Diff line number Diff line
@@ -9,6 +9,8 @@ 
#include <linux/bitops.h>

#include <linux/in6.h>



#ifdef CONFIG_64BIT



#define _HAVE_ARCH_IPV6_CSUM

__sum16 csum_ipv6_magic(const struct in6_addr *saddr,

			const struct in6_addr *daddr,
@@ -61,6 +63,8 @@ static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) 
extern unsigned int do_csum(const unsigned char *buff, int len);

#define do_csum do_csum



#endif



#include <asm-generic/checksum.h>



#endif	/* __ASM_CHECKSUM_H */

arch/loongarch/include/asm/jump_label.h

+10 −2
Original line number Diff line number Diff line
@@ -10,15 +10,23 @@ 
#ifndef __ASSEMBLER__



#include <linux/types.h>

#include <linux/stringify.h>

#include <asm/asm.h>



#define JUMP_LABEL_NOP_SIZE	4



#ifdef CONFIG_32BIT

#define JUMP_LABEL_TYPE		".long "

#else

#define JUMP_LABEL_TYPE		".quad "

#endif



/* This macro is also expanded on the Rust side. */

#define JUMP_TABLE_ENTRY(key, label)			\

	 ".pushsection	__jump_table, \"aw\"	\n\t"	\

	 ".align	3			\n\t"	\

	 ".align	" __stringify(PTRLOG) "	\n\t"	\

	 ".long		1b - ., " label " - .	\n\t"	\

	 ".quad		" key " - .		\n\t"	\

	 JUMP_LABEL_TYPE  key " - .		\n\t"	\

	 ".popsection				\n\t"



#define ARCH_STATIC_BRANCH_ASM(key, label)		\

arch/loongarch/include/asm/string.h

+2 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ 
#ifndef _ASM_STRING_H

#define _ASM_STRING_H



#ifdef CONFIG_64BIT

#define __HAVE_ARCH_MEMSET

extern void *memset(void *__s, int __c, size_t __count);

extern void *__memset(void *__s, int __c, size_t __count);
@@ -16,6 +17,7 @@ extern void *__memcpy(void *__to, __const__ void *__from, size_t __n); 
#define __HAVE_ARCH_MEMMOVE

extern void *memmove(void *__dest, __const__ void *__src, size_t __n);

extern void *__memmove(void *__dest, __const__ void *__src, size_t __n);

#endif



#if defined(CONFIG_KASAN) && !defined(__SANITIZE_ADDRESS__)

arch/loongarch/kernel/unaligned.c

+24 −6
Original line number Diff line number Diff line
@@ -27,12 +27,21 @@ static u32 unaligned_instructions_user; 
static u32 unaligned_instructions_kernel;

#endif



static inline unsigned long read_fpr(unsigned int idx)

static inline u64 read_fpr(unsigned int idx)

{

#ifdef CONFIG_64BIT

#define READ_FPR(idx, __value)		\

	__asm__ __volatile__("movfr2gr.d %0, $f"#idx"\n\t" : "=r"(__value));



	unsigned long __value;

#else

#define READ_FPR(idx, __value)								\

{											\

	u32 __value_lo, __value_hi;							\

	__asm__ __volatile__("movfr2gr.s  %0, $f"#idx"\n\t" : "=r"(__value_lo));	\

	__asm__ __volatile__("movfrh2gr.s %0, $f"#idx"\n\t" : "=r"(__value_hi));	\

	__value = (__value_lo | ((u64)__value_hi << 32));				\

}

#endif

	u64 __value;



	switch (idx) {

	case 0:
@@ -138,11 +147,20 @@ static inline unsigned long read_fpr(unsigned int idx) 
	return __value;

}



static inline void write_fpr(unsigned int idx, unsigned long value)

static inline void write_fpr(unsigned int idx, u64 value)

{

#ifdef CONFIG_64BIT

#define WRITE_FPR(idx, value)		\

	__asm__ __volatile__("movgr2fr.d $f"#idx", %0\n\t" :: "r"(value));



#else

#define WRITE_FPR(idx, value)							\

{										\

	u32 value_lo = value;							\

	u32 value_hi = value >> 32;						\

	__asm__ __volatile__("movgr2fr.w  $f"#idx", %0\n\t" :: "r"(value_lo));	\

	__asm__ __volatile__("movgr2frh.w $f"#idx", %0\n\t" :: "r"(value_hi));	\

}

#endif

	switch (idx) {

	case 0:

		WRITE_FPR(0, value);
@@ -252,7 +270,7 @@ void emulate_load_store_insn(struct pt_regs *regs, void __user *addr, unsigned i 
	bool sign, write;

	bool user = user_mode(regs);

	unsigned int res, size = 0;

	unsigned long value = 0;

	u64 value = 0;

	union loongarch_instruction insn;



	perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);