Commit b17d8aa2 authored by Marc Zyngier's avatar Marc Zyngier Committed by Oliver Upton
Browse files

KVM: arm64: Drop bogus CPTR_EL2.E0POE trap routing 



It took me some time to realise it, but CPTR_EL2.E0POE does not
apply to a guest, only to EL0 when InHost(). And when InHost(),
CPCR_EL2 is mapped to CPACR_EL1, maning that the E0POE bit naturally
takes effect without any trap.

To sum it up, this trap bit is better left ignored, we will never
have to hanedle it.

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20241023145345.1613824-29-maz@kernel.org


Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
parent b9ed7e5d

arch/arm64/kvm/emulate-nested.c

+0 −8
Original line number Diff line number Diff line
@@ -79,7 +79,6 @@ enum cgt_group_id { 
	CGT_MDCR_E2TB,

	CGT_MDCR_TDCC,



	CGT_CPACR_E0POE,

	CGT_CPTR_TAM,

	CGT_CPTR_TCPAC,
@@ -362,12 +361,6 @@ static const struct trap_bits coarse_trap_bits[] = { 
		.mask		= MDCR_EL2_TDCC,

		.behaviour	= BEHAVE_FORWARD_ANY,

	},

	[CGT_CPACR_E0POE] = {

		.index		= CPTR_EL2,

		.value		= CPACR_ELx_E0POE,

		.mask		= CPACR_ELx_E0POE,

		.behaviour	= BEHAVE_FORWARD_ANY,

	},

	[CGT_CPTR_TAM] = {

		.index		= CPTR_EL2,

		.value		= CPTR_EL2_TAM,
@@ -1141,7 +1134,6 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = { 
	SR_TRAP(SYS_AMEVTYPER1_EL0(13),	CGT_CPTR_TAM),

	SR_TRAP(SYS_AMEVTYPER1_EL0(14),	CGT_CPTR_TAM),

	SR_TRAP(SYS_AMEVTYPER1_EL0(15),	CGT_CPTR_TAM),

	SR_TRAP(SYS_POR_EL0,		CGT_CPACR_E0POE),

	/* op0=2, op1=1, and CRn<0b1000 */

	SR_RANGE_TRAP(sys_reg(2, 1, 0, 0, 0),

		      sys_reg(2, 1, 7, 15, 7), CGT_CPTR_TTA),