Commit b1de3c0d authored by Rengarajan S's avatar Rengarajan S Committed by Paolo Abeni
Browse files

net: microchip: lan743x: Reduce PTP timeout on HW failure 



The PTP_CMD_CTL is a self clearing register which controls the PTP clock
values. In the current implementation driver waits for a duration of 20
sec in case of HW failure to clear the PTP_CMD_CTL register bit. This
timeout of 20 sec is very long to recognize a HW failure, as it is
typically cleared in one clock(<16ns). Hence reducing the timeout to 1 sec
would be sufficient to conclude if there is any HW failure observed. The
usleep_range will sleep somewhere between 1 msec to 20 msec for each
iteration. By setting the PTP_CMD_CTL_TIMEOUT_CNT to 50 the max timeout
is extended to 1 sec.

Signed-off-by: default avatarRengarajan S <rengarajan.s@microchip.com>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Link: https://lore.kernel.org/r/20240502050300.38689-1-rengarajan.s@microchip.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent cdc74c9d

drivers/net/ethernet/microchip/lan743x_ptp.c

+1 −1
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@ int lan743x_gpio_init(struct lan743x_adapter *adapter) 
static void lan743x_ptp_wait_till_cmd_done(struct lan743x_adapter *adapter,

					   u32 bit_mask)

{

	int timeout = 1000;

	int timeout = PTP_CMD_CTL_TIMEOUT_CNT;

	u32 data = 0;



	while (timeout &&

drivers/net/ethernet/microchip/lan743x_ptp.h

+1 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 
#define LAN743X_PTP_N_EXTTS		4

#define LAN743X_PTP_N_PPS		0

#define PCI11X1X_PTP_IO_MAX_CHANNELS	8

#define PTP_CMD_CTL_TIMEOUT_CNT		50



struct lan743x_adapter;