Commit b2a4fe09 authored by Miquel Raynal's avatar Miquel Raynal
Browse files

Merge tag 'nand/for-7.1' into mtd/next 

The main changes happened in the SunXi driver in order to
support new versions of the Allwinner NAND controller.

There are also some DT-binding improvements and cleanups.

Finally a couple of actual fixes (Realtek ECC and Winbond SPI NAND),
aside with the usual load of misc changes.
parents 357e460a 7866ce99

Documentation/devicetree/bindings/mtd/gpmi-nand.yaml

+1 −1
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@@ -101,7 +101,7 @@ required: 
unevaluatedProperties: false



allOf:

  - $ref: nand-controller.yaml

  - $ref: nand-controller-legacy.yaml



  - if:

      properties:

Documentation/devicetree/bindings/mtd/mxc-nand.yaml

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@@ -10,22 +10,43 @@ maintainers: 
  - Uwe Kleine-König <u.kleine-koenig@pengutronix.de>



allOf:

  - $ref: nand-controller.yaml

  - $ref: nand-controller-legacy.yaml



properties:

  compatible:

    oneOf:

      - const: fsl,imx27-nand

      - enum:

          - fsl,imx25-nand

          - fsl,imx27-nand

          - fsl,imx51-nand

          - fsl,imx53-nand

      - items:

          - enum:

              - fsl,imx35-nand

          - const: fsl,imx25-nand

      - items:

          - enum:

              - fsl,imx31-nand

          - const: fsl,imx27-nand

  reg:

    maxItems: 1

    minItems: 1

    items:

      - description: IP register space

      - description: Nand flash internal buffer space



  interrupts:

    maxItems: 1



  clocks:

    maxItems: 1



  dmas:

    maxItems: 1



  dma-names:

    items:

      - const: rx-tx



required:

  - compatible

  - reg

Documentation/devicetree/bindings/mtd/nand-chip.yaml

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@@ -11,6 +11,7 @@ maintainers: 


allOf:

  - $ref: mtd.yaml#

  - $ref: nand-property.yaml



description: |

  This file covers the generic description of a NAND chip. It implies that the
@@ -22,51 +23,6 @@ properties: 
    description:

      Contains the chip-select IDs.



  nand-ecc-engine:

    description: |

      A phandle on the hardware ECC engine if any. There are

      basically three possibilities:

      1/ The ECC engine is part of the NAND controller, in this

      case the phandle should reference the parent node.

      2/ The ECC engine is part of the NAND part (on-die), in this

      case the phandle should reference the node itself.

      3/ The ECC engine is external, in this case the phandle should

      reference the specific ECC engine node.

    $ref: /schemas/types.yaml#/definitions/phandle



  nand-use-soft-ecc-engine:

    description: Use a software ECC engine.

    type: boolean



  nand-no-ecc-engine:

    description: Do not use any ECC correction.

    type: boolean



  nand-ecc-algo:

    description:

      Desired ECC algorithm.

    $ref: /schemas/types.yaml#/definitions/string

    enum: [hamming, bch, rs]



  nand-ecc-strength:

    description:

      Maximum number of bits that can be corrected per ECC step.

    $ref: /schemas/types.yaml#/definitions/uint32

    minimum: 1



  nand-ecc-step-size:

    description:

      Number of data bytes covered by a single ECC step.

    $ref: /schemas/types.yaml#/definitions/uint32

    minimum: 1



  secure-regions:

    description:

      Regions in the NAND chip which are protected using a secure element

      like Trustzone. This property contains the start address and size of

      the secure regions present.

    $ref: /schemas/types.yaml#/definitions/uint64-matrix



required:

  - reg

Documentation/devicetree/bindings/mtd/nand-controller-legacy.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/mtd/nand-controller-legacy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NAND Controller Common Properties



maintainers:

  - Miquel Raynal <miquel.raynal@bootlin.com>

  - Richard Weinberger <richard@nod.at>



description: >

  The NAND controller should be represented with its own DT node, and

  all NAND chips attached to this controller should be defined as

  children nodes of the NAND controller. This representation should be

  enforced even for simple controllers supporting only one chip.



  This is only for legacy nand controller, new controller should use

  nand-controller.yaml



properties:



  "#address-cells":

    const: 1



  "#size-cells":

    enum: [0, 1]



  ranges: true



  cs-gpios:

    description:

      Array of chip-select available to the controller. The first

      entries are a 1:1 mapping of the available chip-select on the

      NAND controller (even if they are not used). As many additional

      chip-select as needed may follow and should be phandles of GPIO

      lines. 'reg' entries of the NAND chip subnodes become indexes of

      this array when this property is present.

    minItems: 1

    maxItems: 8



  partitions:

    type: object



    required:

      - compatible



patternProperties:

  "^nand@[a-f0-9]$":

    type: object

    $ref: raw-nand-chip.yaml#



  "^partition@[0-9a-f]+$":

    type: object

    $ref: /schemas/mtd/partitions/partition.yaml#/$defs/partition-node

    deprecated: true



allOf:

  - $ref: raw-nand-property.yaml#

  - $ref: nand-property.yaml#



# This is a generic file other binding inherit from and extend

additionalProperties: true

Documentation/devicetree/bindings/mtd/nand-controller.yaml

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@@ -16,6 +16,8 @@ description: | 
  children nodes of the NAND controller. This representation should be

  enforced even for simple controllers supporting only one chip.



select: false



properties:

  $nodename:

    pattern: "^nand-controller(@.*)?"