Commit b333067f authored by Ian Rogers's avatar Ian Rogers Committed by Arnaldo Carvalho de Melo
Browse files

perf vendor events intel: Fix spelling mistakes 

Update perf JSON files with spelling fixes by Colin Ian King
<colin.i.king@gmail.com> contributed in:

https://github.com/intel/perfmon/pull/96 "Fix various spelling mistakes and typos as found using codespell #96"

This is added on top of the spelling mistakes and release number
updates in:

  https://github.com/intel/perfmon/pull/98

 "EMR, SPR, CLX, SKX, BDX, HSX, BDW-DE, WSM-EP*, NHM-*, JKT, IVT : Release event updates"

Some additional spelling fixes reported by Edward Baker
<edward.baker@intel.com> are added on top of this.

Signed-off-by: default avatarIan Rogers <irogers@google.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Colin Ian King <colin.i.king@gmail.com>
Cc: Edward Baker <edward.baker@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Link: https://lore.kernel.org/r/20230829001730.1352769-3-irogers@google.com


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 8c994eff

tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json

+3 −3
Original line number Diff line number Diff line
@@ -395,13 +395,13 @@ 
        "Unit": "cpu_atom"

    },

    {

        "BriefDescription": "Instructions per Branch (lower number means higher occurance rate)",

        "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)",

        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES",

        "MetricName": "tma_info_inst_mix_ipbranch",

        "Unit": "cpu_atom"

    },

    {

        "BriefDescription": "Instruction per (near) call (lower number means higher occurance rate)",

        "BriefDescription": "Instruction per (near) call (lower number means higher occurrence rate)",

        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.CALL",

        "MetricName": "tma_info_inst_mix_ipcall",

        "Unit": "cpu_atom"
@@ -726,7 +726,7 @@ 
        "Unit": "cpu_atom"

    },

    {

        "BriefDescription": "Counts the numer of issue slots  that result in retirement slots.",

        "BriefDescription": "Counts the number of issue slots  that result in retirement slots.",

        "DefaultMetricgroupName": "TopdownL1",

        "MetricExpr": "TOPDOWN_RETIRING.ALL / tma_info_core_slots",

        "MetricGroup": "Default;TopdownL1;tma_L1_group",

tools/perf/pmu-events/arch/x86/alderlake/pipeline.json

+1 −1
Original line number Diff line number Diff line
@@ -1145,7 +1145,7 @@ 
        "BriefDescription": "TMA slots wasted due to incorrect speculation by branch mispredictions",

        "EventCode": "0xa4",

        "EventName": "TOPDOWN.BR_MISPREDICT_SLOTS",

        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of specualtive operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction.",

        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction.",

        "SampleAfterValue": "10000003",

        "UMask": "0x8",

        "Unit": "cpu_core"

tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json

+3 −3
Original line number Diff line number Diff line
@@ -328,12 +328,12 @@ 
        "MetricName": "tma_info_inst_mix_idiv_uop_ratio"

    },

    {

        "BriefDescription": "Instructions per Branch (lower number means higher occurance rate)",

        "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)",

        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES",

        "MetricName": "tma_info_inst_mix_ipbranch"

    },

    {

        "BriefDescription": "Instruction per (near) call (lower number means higher occurance rate)",

        "BriefDescription": "Instruction per (near) call (lower number means higher occurrence rate)",

        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.CALL",

        "MetricName": "tma_info_inst_mix_ipcall"

    },
@@ -616,7 +616,7 @@ 
        "ScaleUnit": "100%"

    },

    {

        "BriefDescription": "Counts the numer of issue slots  that result in retirement slots.",

        "BriefDescription": "Counts the number of issue slots  that result in retirement slots.",

        "DefaultMetricgroupName": "TopdownL1",

        "MetricExpr": "TOPDOWN_RETIRING.ALL / tma_info_core_slots",

        "MetricGroup": "Default;TopdownL1;tma_L1_group",

tools/perf/pmu-events/arch/x86/bonnell/frontend.json

+1 −1
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ 
        "UMask": "0x2"

    },

    {

        "BriefDescription": "Non-CISC nacro instructions decoded",

        "BriefDescription": "Non-CISC macro instructions decoded",

        "EventCode": "0xAA",

        "EventName": "MACRO_INSTS.NON_CISC_DECODED",

        "SampleAfterValue": "2000000",

tools/perf/pmu-events/arch/x86/broadwellde/uncore-interconnect.json

+9 −9
Original line number Diff line number Diff line
@@ -253,7 +253,7 @@ 
        "EventCode": "0x4",

        "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL",

        "PerPkg": "1",

        "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",

        "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",

        "Unit": "IRP"

    },

    {
@@ -261,7 +261,7 @@ 
        "EventCode": "0x1",

        "EventName": "UNC_I_RxR_BL_DRS_INSERTS",

        "PerPkg": "1",

        "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",

        "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",

        "Unit": "IRP"

    },

    {
@@ -269,7 +269,7 @@ 
        "EventCode": "0x7",

        "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY",

        "PerPkg": "1",

        "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",

        "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",

        "Unit": "IRP"

    },

    {
@@ -277,7 +277,7 @@ 
        "EventCode": "0x5",

        "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL",

        "PerPkg": "1",

        "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",

        "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",

        "Unit": "IRP"

    },

    {
@@ -285,7 +285,7 @@ 
        "EventCode": "0x2",

        "EventName": "UNC_I_RxR_BL_NCB_INSERTS",

        "PerPkg": "1",

        "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",

        "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",

        "Unit": "IRP"

    },

    {
@@ -293,7 +293,7 @@ 
        "EventCode": "0x8",

        "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY",

        "PerPkg": "1",

        "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",

        "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",

        "Unit": "IRP"

    },

    {
@@ -301,7 +301,7 @@ 
        "EventCode": "0x6",

        "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL",

        "PerPkg": "1",

        "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",

        "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",

        "Unit": "IRP"

    },

    {
@@ -309,7 +309,7 @@ 
        "EventCode": "0x3",

        "EventName": "UNC_I_RxR_BL_NCS_INSERTS",

        "PerPkg": "1",

        "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",

        "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",

        "Unit": "IRP"

    },

    {
@@ -317,7 +317,7 @@ 
        "EventCode": "0x9",

        "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY",

        "PerPkg": "1",

        "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",

        "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",

        "Unit": "IRP"

    },

    {