Commit b48688ea authored by ChunHao Lin's avatar ChunHao Lin Committed by Jakub Kicinski
Browse files

r8169: disable RTL8126 ZRX-DC timeout 



Disable it due to it dose not meet ZRX-DC specification. If it is enabled,
device will exit L1 substate every 100ms. Disable it for saving more power
in L1 substate.

Signed-off-by: default avatarChunHao Lin <hau@realtek.com>
Reviewed-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
Link: https://patch.msgid.link/20250318083721.4127-3-hau@realtek.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 3d9b8ac5

drivers/net/ethernet/realtek/r8169_main.c

+27 −0
Original line number Diff line number Diff line
@@ -2852,6 +2852,32 @@ static u32 rtl_csi_read(struct rtl8169_private *tp, int addr) 
		RTL_R32(tp, CSIDR) : ~0;

}



static void rtl_disable_zrxdc_timeout(struct rtl8169_private *tp)

{

	struct pci_dev *pdev = tp->pci_dev;

	u32 csi;

	int rc;

	u8 val;



#define RTL_GEN3_RELATED_OFF	0x0890

#define RTL_GEN3_ZRXDC_NONCOMPL	0x1

	if (pdev->cfg_size > RTL_GEN3_RELATED_OFF) {

		rc = pci_read_config_byte(pdev, RTL_GEN3_RELATED_OFF, &val);

		if (rc == PCIBIOS_SUCCESSFUL) {

			val &= ~RTL_GEN3_ZRXDC_NONCOMPL;

			rc = pci_write_config_byte(pdev, RTL_GEN3_RELATED_OFF,

						   val);

			if (rc == PCIBIOS_SUCCESSFUL)

				return;

		}

	}



	netdev_notice_once(tp->dev,

		"No native access to PCI extended config space, falling back to CSI\n");

	csi = rtl_csi_read(tp, RTL_GEN3_RELATED_OFF);

	rtl_csi_write(tp, RTL_GEN3_RELATED_OFF, csi & ~RTL_GEN3_ZRXDC_NONCOMPL);

}



static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val)

{

	struct pci_dev *pdev = tp->pci_dev;
@@ -3824,6 +3850,7 @@ static void rtl_hw_start_8125d(struct rtl8169_private *tp) 


static void rtl_hw_start_8126a(struct rtl8169_private *tp)

{

	rtl_disable_zrxdc_timeout(tp);

	rtl_set_def_aspm_entry_latency(tp);

	rtl_hw_start_8125_common(tp);

}