Commit b4e394e8 authored by Sunil Khatri's avatar Sunil Khatri Committed by Alex Deucher
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drm/amdgpu: add CP headers registers to gfx10 dump 



add registers in the ip dump for CP headers in gfx10

Signed-off-by: default avatarSunil Khatri <sunil.khatri@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b911505e

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+8 −1
Original line number Diff line number Diff line
@@ -366,7 +366,14 @@ static const struct amdgpu_hwip_reg_entry gc_reg_list_10_1[] = { 
	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_DEBUG_INST_A),

	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_DEBUG_INST_B),

	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_DEBUG_INST_ADDR),

	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_LX6_CORE_PDEBUG_INST)

	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_LX6_CORE_PDEBUG_INST),

	/* cp header registers */

	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME2_HEADER_DUMP),

	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MES_HEADER_DUMP)

};



static const struct soc15_reg_golden golden_settings_gc_10_1[] = {