Commit b50788f7 authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvm-riscv-fixes-6.10-1' of https://github.com/kvm-riscv/linux into HEAD 

KVM/riscv fixes for 6.10, take #1

- No need to use mask when hart-index-bits is 0
- Fix incorrect reg_subtype labels in kvm_riscv_vcpu_set_reg_isa_ext()
parents b3233c73 c66f3b40

arch/riscv/kvm/aia_device.c

+4 −3
Original line number Diff line number Diff line
@@ -237,8 +237,9 @@ static gpa_t aia_imsic_ppn(struct kvm_aia *aia, gpa_t addr) 


static u32 aia_imsic_hart_index(struct kvm_aia *aia, gpa_t addr)

{

	u32 hart, group = 0;

	u32 hart = 0, group = 0;



	if (aia->nr_hart_bits)

		hart = (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) &

		       GENMASK_ULL(aia->nr_hart_bits - 1, 0);

	if (aia->nr_group_bits)

arch/riscv/kvm/vcpu_onereg.c

+2 −2
Original line number Diff line number Diff line
@@ -724,9 +724,9 @@ static int kvm_riscv_vcpu_set_reg_isa_ext(struct kvm_vcpu *vcpu, 
	switch (reg_subtype) {

	case KVM_REG_RISCV_ISA_SINGLE:

		return riscv_vcpu_set_isa_ext_single(vcpu, reg_num, reg_val);

	case KVM_REG_RISCV_SBI_MULTI_EN:

	case KVM_REG_RISCV_ISA_MULTI_EN:

		return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, true);

	case KVM_REG_RISCV_SBI_MULTI_DIS:

	case KVM_REG_RISCV_ISA_MULTI_DIS:

		return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, false);

	default:

		return -ENOENT;