Commit b52c4093 authored by Jouni Högander's avatar Jouni Högander
Browse files

drm/i915/psr: Move writing early transport pipe src 



Currently PIPE_SRCSZ_ERLY_TPT is written in
intel_display.c:intel_set_pipe_src_size. This doesn't work as
intel_set_pipe_src_size is called only on modeset.

Bspec: 68927

Fixes: 3291bbb9 ("drm/i915/psr: Configure PIPE_SRCSZ_ERLY_TPT for psr2 early transport")
Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarMika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240319123327.1661097-3-jouni.hogander@intel.com
parent f3b899f0

drivers/gpu/drm/i915/display/intel_display.c

+0 −9
Original line number Diff line number Diff line
@@ -2748,15 +2748,6 @@ static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state) 
	 */

	intel_de_write(dev_priv, PIPESRC(pipe),

		       PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1));



	if (!crtc_state->enable_psr2_su_region_et)

		return;



	width = drm_rect_width(&crtc_state->psr2_su_area);

	height = drm_rect_height(&crtc_state->psr2_su_area);



	intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(pipe),

		       PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1));

}



static bool intel_pipe_is_interlaced(const struct intel_crtc_state *crtc_state)

drivers/gpu/drm/i915/display/intel_psr.c

+7 −0
Original line number Diff line number Diff line
@@ -2015,6 +2015,7 @@ static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp) 


void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state)

{

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);

	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

	struct intel_encoder *encoder;
@@ -2034,6 +2035,12 @@ void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_st 


	intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder),

		       crtc_state->psr2_man_track_ctl);



	if (!crtc_state->enable_psr2_su_region_et)

		return;



	intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(crtc->pipe),

		       crtc_state->pipe_srcsz_early_tpt);

}



static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,