Commit b5cdb9b3 authored by Hariprasad Kelam's avatar Hariprasad Kelam Committed by Jakub Kicinski
Browse files

octeontx2-pf: AF_XDP: code clean up 



The current API, otx2_xdp_sq_append_pkt, verifies the number of available
descriptors before sending packets to the hardware.

However, for AF_XDP, this check is unnecessary because the batch value
is already determined based on the free descriptors.

This patch introduces a new API, "otx2_xsk_sq_append_pkt" to address this.

Remove the logic for releasing the TX buffers, as it is implicitly handled
by xsk_tx_peek_release_desc_batch

Signed-off-by: default avatarHariprasad Kelam <hkelam@marvell.com>
Link: https://patch.msgid.link/20250420032350.4047706-1-hkelam@marvell.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 3fec58f5

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h

+2 −0
Original line number Diff line number Diff line
@@ -1107,6 +1107,8 @@ int otx2_enable_rxvlan(struct otx2_nic *pf, bool enable); 
int otx2_install_rxvlan_offload_flow(struct otx2_nic *pfvf);

bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, struct xdp_frame *xdpf,

			    u64 iova, int len, u16 qidx, u16 flags);

void otx2_xdp_sqe_add_sg(struct otx2_snd_queue *sq, struct xdp_frame *xdpf,

			 u64 dma_addr, int len, int *offset, u16 flags);

u16 otx2_get_max_mtu(struct otx2_nic *pfvf);

int otx2_handle_ntuple_tc_features(struct net_device *netdev,

				   netdev_features_t features);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c

+2 −3
Original line number Diff line number Diff line
@@ -1410,8 +1410,7 @@ void otx2_free_pending_sqe(struct otx2_nic *pfvf) 
	}

}



static void otx2_xdp_sqe_add_sg(struct otx2_snd_queue *sq,

				struct xdp_frame *xdpf,

void otx2_xdp_sqe_add_sg(struct otx2_snd_queue *sq, struct xdp_frame *xdpf,

			 u64 dma_addr, int len, int *offset, u16 flags)

{

	struct nix_sqe_sg_s *sg = NULL;

drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.c

+31 −11
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include <net/xdp.h>



#include "otx2_common.h"

#include "otx2_struct.h"

#include "otx2_xsk.h"



int otx2_xsk_pool_alloc_buf(struct otx2_nic *pfvf, struct otx2_pool *pool,
@@ -196,11 +197,39 @@ void otx2_attach_xsk_buff(struct otx2_nic *pfvf, struct otx2_snd_queue *sq, int 
		sq->xsk_pool = xsk_get_pool_from_qid(pfvf->netdev, qidx);

}



static void otx2_xsk_sq_append_pkt(struct otx2_nic *pfvf, u64 iova, int len,

				   u16 qidx)

{

	struct nix_sqe_hdr_s *sqe_hdr;

	struct otx2_snd_queue *sq;

	int offset;



	sq = &pfvf->qset.sq[qidx];

	memset(sq->sqe_base + 8, 0, sq->sqe_size - 8);



	sqe_hdr = (struct nix_sqe_hdr_s *)(sq->sqe_base);



	if (!sqe_hdr->total) {

		sqe_hdr->aura = sq->aura_id;

		sqe_hdr->df = 1;

		sqe_hdr->sq = qidx;

		sqe_hdr->pnc = 1;

	}

	sqe_hdr->total = len;

	sqe_hdr->sqe_id = sq->head;



	offset = sizeof(*sqe_hdr);



	otx2_xdp_sqe_add_sg(sq, NULL, iova, len, &offset, OTX2_AF_XDP_FRAME);

	sqe_hdr->sizem1 = (offset / 16) - 1;

	pfvf->hw_ops->sqe_flush(pfvf, sq, offset, qidx);

}



void otx2_zc_napi_handler(struct otx2_nic *pfvf, struct xsk_buff_pool *pool,

			  int queue, int budget)

{

	struct xdp_desc *xdp_desc = pool->tx_descs;

	int err, i, work_done = 0, batch;

	int  i, batch;



	budget = min(budget, otx2_read_free_sqe(pfvf, queue));

	batch = xsk_tx_peek_release_desc_batch(pool, budget);
@@ -211,15 +240,6 @@ void otx2_zc_napi_handler(struct otx2_nic *pfvf, struct xsk_buff_pool *pool, 
		dma_addr_t dma_addr;



		dma_addr = xsk_buff_raw_get_dma(pool, xdp_desc[i].addr);

		err = otx2_xdp_sq_append_pkt(pfvf, NULL, dma_addr, xdp_desc[i].len,

					     queue, OTX2_AF_XDP_FRAME);

		if (!err) {

			netdev_err(pfvf->netdev, "AF_XDP: Unable to transfer packet err%d\n", err);

			break;

		}

		work_done++;

		otx2_xsk_sq_append_pkt(pfvf, dma_addr, xdp_desc[i].len, queue);

	}



	if (work_done)

		xsk_tx_release(pool);

}