Commit b6a7f7e9 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.9-2024-03-27' of... 

Merge tag 'amd-drm-fixes-6.9-2024-03-27' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.9-2024-03-27:

amdgpu:
- SMU 14.0.1 updates
- DCN 3.5.x updates
- VPE fix
- eDP panel flickering fix
- Suspend fix
- PSR fix
- DCN 3.0+ fix
- VCN 4.0.6 updates
- debugfs fix

amdkfd:
- DMA-Buf fix
- GFX 9.4.2 TLB flush fix
- CP interrupt fix

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240328025342.8700-1-alexander.deucher@amd.com
parents 80af1f5b 8678b106

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+2 −0
Original line number Diff line number Diff line
@@ -4539,6 +4539,8 @@ int amdgpu_device_prepare(struct drm_device *dev) 
	if (r)

		goto unprepare;



	flush_delayed_work(&adev->gfx.gfx_off_delay_work);



	for (i = 0; i < adev->num_ip_blocks; i++) {

		if (!adev->ip_blocks[i].status.valid)

			continue;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+1 −0
Original line number Diff line number Diff line
@@ -2237,6 +2237,7 @@ static int amdgpu_discovery_set_umsch_mm_ip_blocks(struct amdgpu_device *adev) 
{

	switch (amdgpu_ip_version(adev, VCN_HWIP, 0)) {

	case IP_VERSION(4, 0, 5):

	case IP_VERSION(4, 0, 6):

		if (amdgpu_umsch_mm & 0x1) {

			amdgpu_device_ip_block_add(adev, &umsch_mm_v4_0_ip_block);

			adev->enable_umsch_mm = true;

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

+29 −17
Original line number Diff line number Diff line
@@ -524,46 +524,58 @@ static ssize_t amdgpu_debugfs_mqd_read(struct file *f, char __user *buf, 
{

	struct amdgpu_ring *ring = file_inode(f)->i_private;

	volatile u32 *mqd;

	int r;

	u32 *kbuf;

	int r, i;

	uint32_t value, result;



	if (*pos & 3 || size & 3)

		return -EINVAL;



	result = 0;

	kbuf = kmalloc(ring->mqd_size, GFP_KERNEL);

	if (!kbuf)

		return -ENOMEM;



	r = amdgpu_bo_reserve(ring->mqd_obj, false);

	if (unlikely(r != 0))

		return r;

		goto err_free;



	r = amdgpu_bo_kmap(ring->mqd_obj, (void **)&mqd);

	if (r) {

	if (r)

		goto err_unreserve;



	/*

	 * Copy to local buffer to avoid put_user(), which might fault

	 * and acquire mmap_sem, under reservation_ww_class_mutex.

	 */

	for (i = 0; i < ring->mqd_size/sizeof(u32); i++)

		kbuf[i] = mqd[i];



	amdgpu_bo_kunmap(ring->mqd_obj);

	amdgpu_bo_unreserve(ring->mqd_obj);

		return r;

	}



	result = 0;

	while (size) {

		if (*pos >= ring->mqd_size)

			goto done;

			break;



		value = mqd[*pos/4];

		value = kbuf[*pos/4];

		r = put_user(value, (uint32_t *)buf);

		if (r)

			goto done;

			goto err_free;

		buf += 4;

		result += 4;

		size -= 4;

		*pos += 4;

	}



done:

	amdgpu_bo_kunmap(ring->mqd_obj);

	mqd = NULL;

	kfree(kbuf);

	return result;



err_unreserve:

	amdgpu_bo_unreserve(ring->mqd_obj);

	if (r)

err_free:

	kfree(kbuf);

	return r;



	return result;

}



static const struct file_operations amdgpu_debugfs_mqd_fops = {

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c

+10 −2
Original line number Diff line number Diff line
@@ -189,10 +189,13 @@ static void setup_vpe_queue(struct amdgpu_device *adev, 
	mqd->rptr_val = 0;

	mqd->unmapped = 1;



	if (adev->vpe.collaborate_mode)

		memcpy(++mqd, test->mqd_data_cpu_addr, sizeof(struct MQD_INFO));



	qinfo->mqd_addr = test->mqd_data_gpu_addr;

	qinfo->csa_addr = test->ctx_data_gpu_addr +

		offsetof(struct umsch_mm_test_ctx_data, vpe_ctx_csa);

	qinfo->doorbell_offset_0 = (adev->doorbell_index.vpe_ring + 1) << 1;

	qinfo->doorbell_offset_0 = 0;

	qinfo->doorbell_offset_1 = 0;

}
@@ -287,7 +290,10 @@ static int submit_vpe_queue(struct amdgpu_device *adev, struct umsch_mm_test *te 
	ring[5] = 0;



	mqd->wptr_val = (6 << 2);

	// WDOORBELL32(adev->umsch_mm.agdb_index[CONTEXT_PRIORITY_LEVEL_NORMAL], mqd->wptr_val);

	if (adev->vpe.collaborate_mode)

		(++mqd)->wptr_val = (6 << 2);



	WDOORBELL32(adev->umsch_mm.agdb_index[CONTEXT_PRIORITY_LEVEL_NORMAL], mqd->wptr_val);



	for (i = 0; i < adev->usec_timeout; i++) {

		if (*fence == test_pattern)
@@ -571,6 +577,7 @@ int amdgpu_umsch_mm_init_microcode(struct amdgpu_umsch_mm *umsch) 


	switch (amdgpu_ip_version(adev, VCN_HWIP, 0)) {

	case IP_VERSION(4, 0, 5):

	case IP_VERSION(4, 0, 6):

		fw_name = "amdgpu/umsch_mm_4_0_0.bin";

		break;

	default:
@@ -750,6 +757,7 @@ static int umsch_mm_early_init(void *handle) 


	switch (amdgpu_ip_version(adev, VCN_HWIP, 0)) {

	case IP_VERSION(4, 0, 5):

	case IP_VERSION(4, 0, 6):

		umsch_mm_v4_0_set_funcs(&adev->umsch_mm);

		break;

	default:

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

+10 −10
Original line number Diff line number Diff line
@@ -33,13 +33,6 @@ enum UMSCH_SWIP_ENGINE_TYPE { 
	UMSCH_SWIP_ENGINE_TYPE_MAX

};



enum UMSCH_SWIP_AFFINITY_TYPE {

	UMSCH_SWIP_AFFINITY_TYPE_ANY = 0,

	UMSCH_SWIP_AFFINITY_TYPE_VCN0 = 1,

	UMSCH_SWIP_AFFINITY_TYPE_VCN1 = 2,

	UMSCH_SWIP_AFFINITY_TYPE_MAX

};



enum UMSCH_CONTEXT_PRIORITY_LEVEL {

	CONTEXT_PRIORITY_LEVEL_IDLE = 0,

	CONTEXT_PRIORITY_LEVEL_NORMAL = 1,
@@ -51,13 +44,15 @@ enum UMSCH_CONTEXT_PRIORITY_LEVEL { 
struct umsch_mm_set_resource_input {

	uint32_t vmid_mask_mm_vcn;

	uint32_t vmid_mask_mm_vpe;

	uint32_t collaboration_mask_vpe;

	uint32_t logging_vmid;

	uint32_t engine_mask;

	union {

		struct {

			uint32_t disable_reset : 1;

			uint32_t disable_umsch_mm_log : 1;

			uint32_t reserved : 30;

			uint32_t use_rs64mem_for_proc_ctx_csa : 1;

			uint32_t reserved : 29;

		};

		uint32_t uint32_all;

	};
@@ -78,15 +73,18 @@ struct umsch_mm_add_queue_input { 
	uint32_t doorbell_offset_1;

	enum UMSCH_SWIP_ENGINE_TYPE engine_type;

	uint32_t affinity;

	enum UMSCH_SWIP_AFFINITY_TYPE affinity_type;

	uint64_t mqd_addr;

	uint64_t h_context;

	uint64_t h_queue;

	uint32_t vm_context_cntl;



	uint32_t process_csa_array_index;

	uint32_t context_csa_array_index;



	struct {

		uint32_t is_context_suspended : 1;

		uint32_t reserved : 31;

		uint32_t collaboration_mode : 1;

		uint32_t reserved : 30;

	};

};
@@ -94,6 +92,7 @@ struct umsch_mm_remove_queue_input { 
	uint32_t doorbell_offset_0;

	uint32_t doorbell_offset_1;

	uint64_t context_csa_addr;

	uint32_t context_csa_array_index;

};



struct MQD_INFO {
@@ -103,6 +102,7 @@ struct MQD_INFO { 
	uint32_t wptr_val;

	uint32_t rptr_val;

	uint32_t unmapped;

	uint32_t vmid;

};



struct amdgpu_umsch_mm;