Commit b6b7aaf3 authored by Frank Li's avatar Frank Li Committed by Shawn Guo
Browse files

arm64: dts: imx8qm: add mipi subsystem 



Include common imx8-ss-mipi0.dtsi and imx8-ss-mipi1.dtsi.

Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 9b0a5fac

arch/arm64/boot/dts/freescale/imx8qm-ss-mipi.dtsi

0 → 100644
+19 −0
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// SPDX-License-Identifier: GPL-2.0+



/*

 * Copyright 2024 NXP

 */



&mipi0_lis_lpcg {

	clocks = <&dsi_ipg_clk>;

	clock-indices = <IMX_LPCG_CLK_0>;

	clock-output-names = "mipi0_lis_lpcg_ipg_clk";

};



&mipi0_pwm_lpcg {

	clocks = <&clk IMX_SC_R_MIPI_0_PWM_0 IMX_SC_PM_CLK_PER>,

		 <&dsi_ipg_clk>;

	clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;

	clock-output-names = "mipi0_pwm_lpcg_clk",

			     "mipi0_pwm_lpcg_ipg_clk";

};
 
 No newline at end of file

arch/arm64/boot/dts/freescale/imx8qm.dtsi

+17 −0
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@@ -567,12 +567,28 @@ lvds_ipg_clk: clock-controller-lvds-ipg { 
		clock-output-names = "lvds0_ipg_clk";

	};



	dsi_ipg_clk: clock-controller-dsi-ipg {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <120000000>;

		clock-output-names = "dsi_ipg_clk";

	};



	mipi_pll_div2_clk: clock-controller-mipi-div2-pll {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <432000000>;

		clock-output-names = "mipi_pll_div2_clk";

	};



	/* sorted in register address */

	#include "imx8-ss-cm41.dtsi"

	#include "imx8-ss-audio.dtsi"

	#include "imx8-ss-vpu.dtsi"

	#include "imx8-ss-gpu0.dtsi"

	#include "imx8-ss-mipi0.dtsi"

	#include "imx8-ss-lvds0.dtsi"

	#include "imx8-ss-mipi1.dtsi"

	#include "imx8-ss-lvds1.dtsi"

	#include "imx8-ss-img.dtsi"

	#include "imx8-ss-dma.dtsi"
@@ -586,3 +602,4 @@ lvds_ipg_clk: clock-controller-lvds-ipg { 
#include "imx8qm-ss-lsio.dtsi"

#include "imx8qm-ss-audio.dtsi"

#include "imx8qm-ss-lvds.dtsi"

#include "imx8qm-ss-mipi.dtsi"