Unverified Commit b6da6cbe authored by Jisheng Zhang's avatar Jisheng Zhang Committed by Palmer Dabbelt
Browse files

riscv: introduce RISCV_EFFICIENT_UNALIGNED_ACCESS 



Some riscv implementations such as T-HEAD's C906, C908, C910 and C920
support efficient unaligned access, for performance reason we want
to enable HAVE_EFFICIENT_UNALIGNED_ACCESS on these platforms. To
avoid performance regressions on other non efficient unaligned access
platforms, HAVE_EFFICIENT_UNALIGNED_ACCESS can't be globally selected.

To solve this problem, runtime code patching based on the detected
speed is a good solution. But that's not easy, it involves lots of
work to modify vairous subsystems such as net, mm, lib and so on.
This can be done step by step.

So let's take an easier solution: add support to efficient unaligned
access and hide the support under NONPORTABLE.

Now let's introduce RISCV_EFFICIENT_UNALIGNED_ACCESS which depends on
NONPORTABLE, if users know during config time that the kernel will be
only run on those efficient unaligned access hw platforms, they can
enable it. Obviously, generic unified kernel Image shouldn't enable it.

Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
Reviewed-by: default avatarCharlie Jenkins <charlie@rivosinc.com>
Reviewed-by: default avatarEric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20231225044207.3821-2-jszhang@kernel.org


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent b85ea95d

arch/riscv/Kconfig

+13 −0
Original line number Diff line number Diff line
@@ -651,6 +651,19 @@ config RISCV_MISALIGNED 
	  load/store for both kernel and userspace. When disable, misaligned

	  accesses will generate SIGBUS in userspace and panic in kernel.



config RISCV_EFFICIENT_UNALIGNED_ACCESS

	bool "Assume the CPU supports fast unaligned memory accesses"

	depends on NONPORTABLE

	select HAVE_EFFICIENT_UNALIGNED_ACCESS

	help

	  Say Y here if you want the kernel to assume that the CPU supports

	  efficient unaligned memory accesses.  When enabled, this option

	  improves the performance of the kernel on such CPUs.  However, the

	  kernel will run much more slowly, or will not be able to run at all,

	  on CPUs that do not support efficient unaligned memory accesses.



	  If unsure what to do here, say N.



endmenu # "Platform type"



menu "Kernel features"

arch/riscv/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -108,7 +108,9 @@ KBUILD_AFLAGS_MODULE += $(call as-option,-Wa$(comma)-mno-relax) 
# unaligned accesses.  While unaligned accesses are explicitly allowed in the

# RISC-V ISA, they're emulated by machine mode traps on all extant

# architectures.  It's faster to have GCC emit only aligned accesses.

ifneq ($(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS),y)

KBUILD_CFLAGS += $(call cc-option,-mstrict-align)

endif



ifeq ($(CONFIG_STACKPROTECTOR_PER_TASK),y)

prepare: stack_protector_prepare