Commit b7043800 authored by Alex Deucher's avatar Alex Deucher Committed by Luben Tuikov
Browse files

drm/amdgpu: move buffer funcs setting up a level 



Rather than doing this in the IP code for the SDMA paging
engine, move it up to the core device level init level.
This should fix the scheduler init ordering.

v2: drop extra parens
v3: drop SDMA helpers
v4: Added a Fixes tag because amdgpu dereferences an uninitialized
    scheduler without this patch, and this patch fixes this. (Luben)

Tested-by: default avatarLuben Tuikov <luben.tuikov@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/r/20231025171928.3318505-1-alexander.deucher@amd.com


Acked-by: default avatarChristian König <christian.koenig@amd.com>
Fixes: 56e44960 ("drm/sched: Convert the GPU scheduler to variable number of run-queues")
Signed-off-by: default avatarLuben Tuikov <ltuikov89@gmail.com>
parent c07bf163

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+15 −0
Original line number Diff line number Diff line
@@ -2450,6 +2450,9 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev) 
	if (r)

		goto init_failed;



	if (adev->mman.buffer_funcs_ring->sched.ready)

		amdgpu_ttm_set_buffer_funcs_status(adev, true);



	/* Don't init kfd if whole hive need to be reset during init */

	if (!adev->gmc.xgmi.pending_reset) {

		kgd2kfd_init_zone_device(adev);
@@ -3045,6 +3048,8 @@ int amdgpu_device_ip_suspend(struct amdgpu_device *adev) 
		amdgpu_virt_request_full_gpu(adev, false);

	}



	amdgpu_ttm_set_buffer_funcs_status(adev, false);



	r = amdgpu_device_ip_suspend_phase1(adev);

	if (r)

		return r;
@@ -3234,6 +3239,9 @@ static int amdgpu_device_ip_resume(struct amdgpu_device *adev) 


	r = amdgpu_device_ip_resume_phase2(adev);



	if (adev->mman.buffer_funcs_ring->sched.ready)

		amdgpu_ttm_set_buffer_funcs_status(adev, true);



	return r;

}
@@ -4008,6 +4016,8 @@ void amdgpu_device_fini_hw(struct amdgpu_device *adev) 
	/* disable ras feature must before hw fini */

	amdgpu_ras_pre_fini(adev);



	amdgpu_ttm_set_buffer_funcs_status(adev, false);



	amdgpu_device_ip_fini_early(adev);



	amdgpu_irq_fini_hw(adev);
@@ -4146,6 +4156,8 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon) 


	amdgpu_ras_suspend(adev);



	amdgpu_ttm_set_buffer_funcs_status(adev, false);



	amdgpu_device_ip_suspend_phase1(adev);



	if (!adev->in_s0ix)
@@ -4971,6 +4983,9 @@ int amdgpu_do_asic_reset(struct list_head *device_list_handle, 
				if (r)

					goto out;



				if (tmp_adev->mman.buffer_funcs_ring->sched.ready)

					amdgpu_ttm_set_buffer_funcs_status(tmp_adev, true);



				if (vram_lost)

					amdgpu_device_fill_reset_magic(tmp_adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

+0 −21
Original line number Diff line number Diff line
@@ -289,27 +289,6 @@ int amdgpu_sdma_init_microcode(struct amdgpu_device *adev, 
	return err;

}



void amdgpu_sdma_unset_buffer_funcs_helper(struct amdgpu_device *adev)

{

	struct amdgpu_ring *sdma;

	int i;



	for (i = 0; i < adev->sdma.num_instances; i++) {

		if (adev->sdma.has_page_queue) {

			sdma = &adev->sdma.instance[i].page;

			if (adev->mman.buffer_funcs_ring == sdma) {

				amdgpu_ttm_set_buffer_funcs_status(adev, false);

				break;

			}

		}

		sdma = &adev->sdma.instance[i].ring;

		if (adev->mman.buffer_funcs_ring == sdma) {

			amdgpu_ttm_set_buffer_funcs_status(adev, false);

			break;

		}

	}

}



int amdgpu_sdma_ras_sw_init(struct amdgpu_device *adev)

{

	int err = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h

+0 −1
Original line number Diff line number Diff line
@@ -169,7 +169,6 @@ int amdgpu_sdma_init_microcode(struct amdgpu_device *adev, u32 instance, 
			       bool duplicate);

void amdgpu_sdma_destroy_inst_ctx(struct amdgpu_device *adev,

        bool duplicate);

void amdgpu_sdma_unset_buffer_funcs_helper(struct amdgpu_device *adev);

int amdgpu_sdma_ras_sw_init(struct amdgpu_device *adev);



#endif

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

+0 −5
Original line number Diff line number Diff line
@@ -308,8 +308,6 @@ static void cik_sdma_gfx_stop(struct amdgpu_device *adev) 
	u32 rb_cntl;

	int i;



	amdgpu_sdma_unset_buffer_funcs_helper(adev);



	for (i = 0; i < adev->sdma.num_instances; i++) {

		rb_cntl = RREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i]);

		rb_cntl &= ~SDMA0_GFX_RB_CNTL__RB_ENABLE_MASK;
@@ -498,9 +496,6 @@ static int cik_sdma_gfx_resume(struct amdgpu_device *adev) 
		r = amdgpu_ring_test_helper(ring);

		if (r)

			return r;



		if (adev->mman.buffer_funcs_ring == ring)

			amdgpu_ttm_set_buffer_funcs_status(adev, true);

	}



	return 0;

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

+0 −5
Original line number Diff line number Diff line
@@ -339,8 +339,6 @@ static void sdma_v2_4_gfx_stop(struct amdgpu_device *adev) 
	u32 rb_cntl, ib_cntl;

	int i;



	amdgpu_sdma_unset_buffer_funcs_helper(adev);



	for (i = 0; i < adev->sdma.num_instances; i++) {

		rb_cntl = RREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i]);

		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);
@@ -474,9 +472,6 @@ static int sdma_v2_4_gfx_resume(struct amdgpu_device *adev) 
		r = amdgpu_ring_test_helper(ring);

		if (r)

			return r;



		if (adev->mman.buffer_funcs_ring == ring)

			amdgpu_ttm_set_buffer_funcs_status(adev, true);

	}



	return 0;