Commit b7297d45 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Jonathan Cameron
Browse files

dt-bindings: iio: adc: qcom,spmi-adc7: use predefined channel ids 



Each of qcom,spmi-adc7-pm*.h headers define a set of ADC channels that
can be used for monitoring on thie particular chip. Switch them to use
channel IDs defined in the dt-bindings/iio/qcom,spmi-vadc.h header
instead of specifying the numeric IDs.

Suggested-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230707123027.1510723-2-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent 6c7bc1d2

include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h

+45 −43
Original line number Diff line number Diff line
@@ -6,58 +6,60 @@ 
#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H

#define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H



#include <dt-bindings/iio/qcom,spmi-vadc.h>



/* ADC channels for PM8350_ADC for PMIC7 */

#define PM8350_ADC7_REF_GND(sid)			((sid) << 8 | 0x0)

#define PM8350_ADC7_1P25VREF(sid)			((sid) << 8 | 0x01)

#define PM8350_ADC7_VREF_VADC(sid)			((sid) << 8 | 0x02)

#define PM8350_ADC7_DIE_TEMP(sid)			((sid) << 8 | 0x03)



#define PM8350_ADC7_AMUX_THM1(sid)			((sid) << 8 | 0x04)

#define PM8350_ADC7_AMUX_THM2(sid)			((sid) << 8 | 0x05)

#define PM8350_ADC7_AMUX_THM3(sid)			((sid) << 8 | 0x06)

#define PM8350_ADC7_AMUX_THM4(sid)			((sid) << 8 | 0x07)

#define PM8350_ADC7_AMUX_THM5(sid)			((sid) << 8 | 0x08)

#define PM8350_ADC7_GPIO1(sid)				((sid) << 8 | 0x0a)

#define PM8350_ADC7_GPIO2(sid)				((sid) << 8 | 0x0b)

#define PM8350_ADC7_GPIO3(sid)				((sid) << 8 | 0x0c)

#define PM8350_ADC7_GPIO4(sid)				((sid) << 8 | 0x0d)

#define PM8350_ADC7_REF_GND(sid)			((sid) << 8 | ADC7_REF_GND)

#define PM8350_ADC7_1P25VREF(sid)			((sid) << 8 | ADC7_1P25VREF)

#define PM8350_ADC7_VREF_VADC(sid)			((sid) << 8 | ADC7_VREF_VADC)

#define PM8350_ADC7_DIE_TEMP(sid)			((sid) << 8 | ADC7_DIE_TEMP)



#define PM8350_ADC7_AMUX_THM1(sid)			((sid) << 8 | ADC7_AMUX_THM1)

#define PM8350_ADC7_AMUX_THM2(sid)			((sid) << 8 | ADC7_AMUX_THM2)

#define PM8350_ADC7_AMUX_THM3(sid)			((sid) << 8 | ADC7_AMUX_THM3)

#define PM8350_ADC7_AMUX_THM4(sid)			((sid) << 8 | ADC7_AMUX_THM4)

#define PM8350_ADC7_AMUX_THM5(sid)			((sid) << 8 | ADC7_AMUX_THM5)

#define PM8350_ADC7_GPIO1(sid)				((sid) << 8 | ADC7_GPIO1)

#define PM8350_ADC7_GPIO2(sid)				((sid) << 8 | ADC7_GPIO2)

#define PM8350_ADC7_GPIO3(sid)				((sid) << 8 | ADC7_GPIO3)

#define PM8350_ADC7_GPIO4(sid)				((sid) << 8 | ADC7_GPIO4)



/* 30k pull-up1 */

#define PM8350_ADC7_AMUX_THM1_30K_PU(sid)		((sid) << 8 | 0x24)

#define PM8350_ADC7_AMUX_THM2_30K_PU(sid)		((sid) << 8 | 0x25)

#define PM8350_ADC7_AMUX_THM3_30K_PU(sid)		((sid) << 8 | 0x26)

#define PM8350_ADC7_AMUX_THM4_30K_PU(sid)		((sid) << 8 | 0x27)

#define PM8350_ADC7_AMUX_THM5_30K_PU(sid)		((sid) << 8 | 0x28)

#define PM8350_ADC7_GPIO1_30K_PU(sid)			((sid) << 8 | 0x2a)

#define PM8350_ADC7_GPIO2_30K_PU(sid)			((sid) << 8 | 0x2b)

#define PM8350_ADC7_GPIO3_30K_PU(sid)			((sid) << 8 | 0x2c)

#define PM8350_ADC7_GPIO4_30K_PU(sid)			((sid) << 8 | 0x2d)

#define PM8350_ADC7_AMUX_THM1_30K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM1_30K_PU)

#define PM8350_ADC7_AMUX_THM2_30K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM2_30K_PU)

#define PM8350_ADC7_AMUX_THM3_30K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM3_30K_PU)

#define PM8350_ADC7_AMUX_THM4_30K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM4_30K_PU)

#define PM8350_ADC7_AMUX_THM5_30K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM5_30K_PU)

#define PM8350_ADC7_GPIO1_30K_PU(sid)			((sid) << 8 | ADC7_GPIO1_30K_PU)

#define PM8350_ADC7_GPIO2_30K_PU(sid)			((sid) << 8 | ADC7_GPIO2_30K_PU)

#define PM8350_ADC7_GPIO3_30K_PU(sid)			((sid) << 8 | ADC7_GPIO3_30K_PU)

#define PM8350_ADC7_GPIO4_30K_PU(sid)			((sid) << 8 | ADC7_GPIO4_30K_PU)



/* 100k pull-up2 */

#define PM8350_ADC7_AMUX_THM1_100K_PU(sid)		((sid) << 8 | 0x44)

#define PM8350_ADC7_AMUX_THM2_100K_PU(sid)		((sid) << 8 | 0x45)

#define PM8350_ADC7_AMUX_THM3_100K_PU(sid)		((sid) << 8 | 0x46)

#define PM8350_ADC7_AMUX_THM4_100K_PU(sid)		((sid) << 8 | 0x47)

#define PM8350_ADC7_AMUX_THM5_100K_PU(sid)		((sid) << 8 | 0x48)

#define PM8350_ADC7_GPIO1_100K_PU(sid)			((sid) << 8 | 0x4a)

#define PM8350_ADC7_GPIO2_100K_PU(sid)			((sid) << 8 | 0x4b)

#define PM8350_ADC7_GPIO3_100K_PU(sid)			((sid) << 8 | 0x4c)

#define PM8350_ADC7_GPIO4_100K_PU(sid)			((sid) << 8 | 0x4d)

#define PM8350_ADC7_AMUX_THM1_100K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM1_100K_PU)

#define PM8350_ADC7_AMUX_THM2_100K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM2_100K_PU)

#define PM8350_ADC7_AMUX_THM3_100K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM3_100K_PU)

#define PM8350_ADC7_AMUX_THM4_100K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM4_100K_PU)

#define PM8350_ADC7_AMUX_THM5_100K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM5_100K_PU)

#define PM8350_ADC7_GPIO1_100K_PU(sid)			((sid) << 8 | ADC7_GPIO1_100K_PU)

#define PM8350_ADC7_GPIO2_100K_PU(sid)			((sid) << 8 | ADC7_GPIO2_100K_PU)

#define PM8350_ADC7_GPIO3_100K_PU(sid)			((sid) << 8 | ADC7_GPIO3_100K_PU)

#define PM8350_ADC7_GPIO4_100K_PU(sid)			((sid) << 8 | ADC7_GPIO4_100K_PU)



/* 400k pull-up3 */

#define PM8350_ADC7_AMUX_THM1_400K_PU(sid)		((sid) << 8 | 0x64)

#define PM8350_ADC7_AMUX_THM2_400K_PU(sid)		((sid) << 8 | 0x65)

#define PM8350_ADC7_AMUX_THM3_400K_PU(sid)		((sid) << 8 | 0x66)

#define PM8350_ADC7_AMUX_THM4_400K_PU(sid)		((sid) << 8 | 0x67)

#define PM8350_ADC7_AMUX_THM5_400K_PU(sid)		((sid) << 8 | 0x68)

#define PM8350_ADC7_GPIO1_400K_PU(sid)			((sid) << 8 | 0x6a)

#define PM8350_ADC7_GPIO2_400K_PU(sid)			((sid) << 8 | 0x6b)

#define PM8350_ADC7_GPIO3_400K_PU(sid)			((sid) << 8 | 0x6c)

#define PM8350_ADC7_GPIO4_400K_PU(sid)			((sid) << 8 | 0x6d)

#define PM8350_ADC7_AMUX_THM1_400K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM1_400K_PU)

#define PM8350_ADC7_AMUX_THM2_400K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM2_400K_PU)

#define PM8350_ADC7_AMUX_THM3_400K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM3_400K_PU)

#define PM8350_ADC7_AMUX_THM4_400K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM4_400K_PU)

#define PM8350_ADC7_AMUX_THM5_400K_PU(sid)		((sid) << 8 | ADC7_AMUX_THM5_400K_PU)

#define PM8350_ADC7_GPIO1_400K_PU(sid)			((sid) << 8 | ADC7_GPIO1_400K_PU)

#define PM8350_ADC7_GPIO2_400K_PU(sid)			((sid) << 8 | ADC7_GPIO2_400K_PU)

#define PM8350_ADC7_GPIO3_400K_PU(sid)			((sid) << 8 | ADC7_GPIO3_400K_PU)

#define PM8350_ADC7_GPIO4_400K_PU(sid)			((sid) << 8 | ADC7_GPIO4_400K_PU)



/* 1/3 Divider */

#define PM8350_ADC7_GPIO4_DIV3(sid)			((sid) << 8 | 0x8d)

#define PM8350_ADC7_GPIO4_DIV3(sid)			((sid) << 8 | ADC7_GPIO4_DIV3)



#define PM8350_ADC7_VPH_PWR(sid)			((sid) << 8 | 0x8e)

#define PM8350_ADC7_VPH_PWR(sid)			((sid) << 8 | ADC7_VPH_PWR)



#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */

include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h

+63 −61
Original line number Diff line number Diff line
@@ -10,79 +10,81 @@ 
#define PM8350B_SID					3

#endif



#include <dt-bindings/iio/qcom,spmi-vadc.h>



/* ADC channels for PM8350B_ADC for PMIC7 */

#define PM8350B_ADC7_REF_GND			(PM8350B_SID << 8 | 0x0)

#define PM8350B_ADC7_1P25VREF			(PM8350B_SID << 8 | 0x01)

#define PM8350B_ADC7_VREF_VADC			(PM8350B_SID << 8 | 0x02)

#define PM8350B_ADC7_DIE_TEMP			(PM8350B_SID << 8 | 0x03)

#define PM8350B_ADC7_REF_GND			(PM8350B_SID << 8 | ADC7_REF_GND)

#define PM8350B_ADC7_1P25VREF			(PM8350B_SID << 8 | ADC7_1P25VREF)

#define PM8350B_ADC7_VREF_VADC			(PM8350B_SID << 8 | ADC7_VREF_VADC)

#define PM8350B_ADC7_DIE_TEMP			(PM8350B_SID << 8 | ADC7_DIE_TEMP)



#define PM8350B_ADC7_AMUX_THM1			(PM8350B_SID << 8 | 0x04)

#define PM8350B_ADC7_AMUX_THM2			(PM8350B_SID << 8 | 0x05)

#define PM8350B_ADC7_AMUX_THM3			(PM8350B_SID << 8 | 0x06)

#define PM8350B_ADC7_AMUX_THM4			(PM8350B_SID << 8 | 0x07)

#define PM8350B_ADC7_AMUX_THM5			(PM8350B_SID << 8 | 0x08)

#define PM8350B_ADC7_AMUX_THM6			(PM8350B_SID << 8 | 0x09)

#define PM8350B_ADC7_GPIO1			(PM8350B_SID << 8 | 0x0a)

#define PM8350B_ADC7_GPIO2			(PM8350B_SID << 8 | 0x0b)

#define PM8350B_ADC7_GPIO3			(PM8350B_SID << 8 | 0x0c)

#define PM8350B_ADC7_GPIO4			(PM8350B_SID << 8 | 0x0d)

#define PM8350B_ADC7_AMUX_THM1			(PM8350B_SID << 8 | ADC7_AMUX_THM1)

#define PM8350B_ADC7_AMUX_THM2			(PM8350B_SID << 8 | ADC7_AMUX_THM2)

#define PM8350B_ADC7_AMUX_THM3			(PM8350B_SID << 8 | ADC7_AMUX_THM3)

#define PM8350B_ADC7_AMUX_THM4			(PM8350B_SID << 8 | ADC7_AMUX_THM4)

#define PM8350B_ADC7_AMUX_THM5			(PM8350B_SID << 8 | ADC7_AMUX_THM5)

#define PM8350B_ADC7_AMUX_THM6			(PM8350B_SID << 8 | ADC7_AMUX_THM6)

#define PM8350B_ADC7_GPIO1			(PM8350B_SID << 8 | ADC7_GPIO1)

#define PM8350B_ADC7_GPIO2			(PM8350B_SID << 8 | ADC7_GPIO2)

#define PM8350B_ADC7_GPIO3			(PM8350B_SID << 8 | ADC7_GPIO3)

#define PM8350B_ADC7_GPIO4			(PM8350B_SID << 8 | ADC7_GPIO4)



#define PM8350B_ADC7_CHG_TEMP			(PM8350B_SID << 8 | 0x10)

#define PM8350B_ADC7_USB_IN_V_16		(PM8350B_SID << 8 | 0x11)

#define PM8350B_ADC7_VDC_16			(PM8350B_SID << 8 | 0x12)

#define PM8350B_ADC7_CC1_ID			(PM8350B_SID << 8 | 0x13)

#define PM8350B_ADC7_VREF_BAT_THERM		(PM8350B_SID << 8 | 0x15)

#define PM8350B_ADC7_IIN_FB			(PM8350B_SID << 8 | 0x17)

#define PM8350B_ADC7_CHG_TEMP			(PM8350B_SID << 8 | ADC7_CHG_TEMP)

#define PM8350B_ADC7_USB_IN_V_16		(PM8350B_SID << 8 | ADC7_USB_IN_V_16)

#define PM8350B_ADC7_VDC_16			(PM8350B_SID << 8 | ADC7_VDC_16)

#define PM8350B_ADC7_CC1_ID			(PM8350B_SID << 8 | ADC7_CC1_ID)

#define PM8350B_ADC7_VREF_BAT_THERM		(PM8350B_SID << 8 | ADC7_VREF_BAT_THERM)

#define PM8350B_ADC7_IIN_FB			(PM8350B_SID << 8 | ADC7_IIN_FB)



/* 30k pull-up1 */

#define PM8350B_ADC7_AMUX_THM1_30K_PU		(PM8350B_SID << 8 | 0x24)

#define PM8350B_ADC7_AMUX_THM2_30K_PU		(PM8350B_SID << 8 | 0x25)

#define PM8350B_ADC7_AMUX_THM3_30K_PU		(PM8350B_SID << 8 | 0x26)

#define PM8350B_ADC7_AMUX_THM4_30K_PU		(PM8350B_SID << 8 | 0x27)

#define PM8350B_ADC7_AMUX_THM5_30K_PU		(PM8350B_SID << 8 | 0x28)

#define PM8350B_ADC7_AMUX_THM6_30K_PU		(PM8350B_SID << 8 | 0x29)

#define PM8350B_ADC7_GPIO1_30K_PU		(PM8350B_SID << 8 | 0x2a)

#define PM8350B_ADC7_GPIO2_30K_PU		(PM8350B_SID << 8 | 0x2b)

#define PM8350B_ADC7_GPIO3_30K_PU		(PM8350B_SID << 8 | 0x2c)

#define PM8350B_ADC7_GPIO4_30K_PU		(PM8350B_SID << 8 | 0x2d)

#define PM8350B_ADC7_CC1_ID_30K_PU		(PM8350B_SID << 8 | 0x33)

#define PM8350B_ADC7_AMUX_THM1_30K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM1_30K_PU)

#define PM8350B_ADC7_AMUX_THM2_30K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM2_30K_PU)

#define PM8350B_ADC7_AMUX_THM3_30K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM3_30K_PU)

#define PM8350B_ADC7_AMUX_THM4_30K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM4_30K_PU)

#define PM8350B_ADC7_AMUX_THM5_30K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM5_30K_PU)

#define PM8350B_ADC7_AMUX_THM6_30K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM6_30K_PU)

#define PM8350B_ADC7_GPIO1_30K_PU		(PM8350B_SID << 8 | ADC7_GPIO1_30K_PU)

#define PM8350B_ADC7_GPIO2_30K_PU		(PM8350B_SID << 8 | ADC7_GPIO2_30K_PU)

#define PM8350B_ADC7_GPIO3_30K_PU		(PM8350B_SID << 8 | ADC7_GPIO3_30K_PU)

#define PM8350B_ADC7_GPIO4_30K_PU		(PM8350B_SID << 8 | ADC7_GPIO4_30K_PU)

#define PM8350B_ADC7_CC1_ID_30K_PU		(PM8350B_SID << 8 | ADC7_CC1_ID_30K_PU)



/* 100k pull-up2 */

#define PM8350B_ADC7_AMUX_THM1_100K_PU		(PM8350B_SID << 8 | 0x44)

#define PM8350B_ADC7_AMUX_THM2_100K_PU		(PM8350B_SID << 8 | 0x45)

#define PM8350B_ADC7_AMUX_THM3_100K_PU		(PM8350B_SID << 8 | 0x46)

#define PM8350B_ADC7_AMUX_THM4_100K_PU		(PM8350B_SID << 8 | 0x47)

#define PM8350B_ADC7_AMUX_THM5_100K_PU		(PM8350B_SID << 8 | 0x48)

#define PM8350B_ADC7_AMUX_THM6_100K_PU		(PM8350B_SID << 8 | 0x49)

#define PM8350B_ADC7_GPIO1_100K_PU		(PM8350B_SID << 8 | 0x4a)

#define PM8350B_ADC7_GPIO2_100K_PU		(PM8350B_SID << 8 | 0x4b)

#define PM8350B_ADC7_GPIO3_100K_PU		(PM8350B_SID << 8 | 0x4c)

#define PM8350B_ADC7_GPIO4_100K_PU		(PM8350B_SID << 8 | 0x4d)

#define PM8350B_ADC7_CC1_ID_100K_PU		(PM8350B_SID << 8 | 0x53)

#define PM8350B_ADC7_AMUX_THM1_100K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM1_100K_PU)

#define PM8350B_ADC7_AMUX_THM2_100K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM2_100K_PU)

#define PM8350B_ADC7_AMUX_THM3_100K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM3_100K_PU)

#define PM8350B_ADC7_AMUX_THM4_100K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM4_100K_PU)

#define PM8350B_ADC7_AMUX_THM5_100K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM5_100K_PU)

#define PM8350B_ADC7_AMUX_THM6_100K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM6_100K_PU)

#define PM8350B_ADC7_GPIO1_100K_PU		(PM8350B_SID << 8 | ADC7_GPIO1_100K_PU)

#define PM8350B_ADC7_GPIO2_100K_PU		(PM8350B_SID << 8 | ADC7_GPIO2_100K_PU)

#define PM8350B_ADC7_GPIO3_100K_PU		(PM8350B_SID << 8 | ADC7_GPIO3_100K_PU)

#define PM8350B_ADC7_GPIO4_100K_PU		(PM8350B_SID << 8 | ADC7_GPIO4_100K_PU)

#define PM8350B_ADC7_CC1_ID_100K_PU		(PM8350B_SID << 8 | ADC7_CC1_ID_100K_PU)



/* 400k pull-up3 */

#define PM8350B_ADC7_AMUX_THM1_400K_PU		(PM8350B_SID << 8 | 0x64)

#define PM8350B_ADC7_AMUX_THM2_400K_PU		(PM8350B_SID << 8 | 0x65)

#define PM8350B_ADC7_AMUX_THM3_400K_PU		(PM8350B_SID << 8 | 0x66)

#define PM8350B_ADC7_AMUX_THM4_400K_PU		(PM8350B_SID << 8 | 0x67)

#define PM8350B_ADC7_AMUX_THM5_400K_PU		(PM8350B_SID << 8 | 0x68)

#define PM8350B_ADC7_AMUX_THM6_400K_PU		(PM8350B_SID << 8 | 0x69)

#define PM8350B_ADC7_GPIO1_400K_PU		(PM8350B_SID << 8 | 0x6a)

#define PM8350B_ADC7_GPIO2_400K_PU		(PM8350B_SID << 8 | 0x6b)

#define PM8350B_ADC7_GPIO3_400K_PU		(PM8350B_SID << 8 | 0x6c)

#define PM8350B_ADC7_GPIO4_400K_PU		(PM8350B_SID << 8 | 0x6d)

#define PM8350B_ADC7_CC1_ID_400K_PU		(PM8350B_SID << 8 | 0x73)

#define PM8350B_ADC7_AMUX_THM1_400K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM1_400K_PU)

#define PM8350B_ADC7_AMUX_THM2_400K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM2_400K_PU)

#define PM8350B_ADC7_AMUX_THM3_400K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM3_400K_PU)

#define PM8350B_ADC7_AMUX_THM4_400K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM4_400K_PU)

#define PM8350B_ADC7_AMUX_THM5_400K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM5_400K_PU)

#define PM8350B_ADC7_AMUX_THM6_400K_PU		(PM8350B_SID << 8 | ADC7_AMUX_THM6_400K_PU)

#define PM8350B_ADC7_GPIO1_400K_PU		(PM8350B_SID << 8 | ADC7_GPIO1_400K_PU)

#define PM8350B_ADC7_GPIO2_400K_PU		(PM8350B_SID << 8 | ADC7_GPIO2_400K_PU)

#define PM8350B_ADC7_GPIO3_400K_PU		(PM8350B_SID << 8 | ADC7_GPIO3_400K_PU)

#define PM8350B_ADC7_GPIO4_400K_PU		(PM8350B_SID << 8 | ADC7_GPIO4_400K_PU)

#define PM8350B_ADC7_CC1_ID_400K_PU		(PM8350B_SID << 8 | ADC7_CC1_ID_400K_PU)



/* 1/3 Divider */

#define PM8350B_ADC7_GPIO1_DIV3			(PM8350B_SID << 8 | 0x8a)

#define PM8350B_ADC7_GPIO2_DIV3			(PM8350B_SID << 8 | 0x8b)

#define PM8350B_ADC7_GPIO3_DIV3			(PM8350B_SID << 8 | 0x8c)

#define PM8350B_ADC7_GPIO4_DIV3			(PM8350B_SID << 8 | 0x8d)

#define PM8350B_ADC7_GPIO1_DIV3			(PM8350B_SID << 8 | ADC7_GPIO1_DIV3)

#define PM8350B_ADC7_GPIO2_DIV3			(PM8350B_SID << 8 | ADC7_GPIO2_DIV3)

#define PM8350B_ADC7_GPIO3_DIV3			(PM8350B_SID << 8 | ADC7_GPIO3_DIV3)

#define PM8350B_ADC7_GPIO4_DIV3			(PM8350B_SID << 8 | ADC7_GPIO4_DIV3)



#define PM8350B_ADC7_VPH_PWR			(PM8350B_SID << 8 | 0x8e)

#define PM8350B_ADC7_VBAT_SNS			(PM8350B_SID << 8 | 0x8f)

#define PM8350B_ADC7_VPH_PWR			(PM8350B_SID << 8 | ADC7_VPH_PWR)

#define PM8350B_ADC7_VBAT_SNS			(PM8350B_SID << 8 | ADC7_VBAT_SNS)



#define PM8350B_ADC7_SBUx			(PM8350B_SID << 8 | 0x94)

#define PM8350B_ADC7_VBAT_2S_MID		(PM8350B_SID << 8 | 0x96)

#define PM8350B_ADC7_SBUx			(PM8350B_SID << 8 | ADC7_SBU)

#define PM8350B_ADC7_VBAT_2S_MID		(PM8350B_SID << 8 | ADC7_VBAT_2S_MID)



#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H */

include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h

+26 −24
Original line number Diff line number Diff line
@@ -10,37 +10,39 @@ 
#define PMK8350_SID					0

#endif



#include <dt-bindings/iio/qcom,spmi-vadc.h>



/* ADC channels for PMK8350_ADC for PMIC7 */

#define PMK8350_ADC7_REF_GND			(PMK8350_SID << 8 | 0x0)

#define PMK8350_ADC7_1P25VREF			(PMK8350_SID << 8 | 0x01)

#define PMK8350_ADC7_VREF_VADC			(PMK8350_SID << 8 | 0x02)

#define PMK8350_ADC7_DIE_TEMP			(PMK8350_SID << 8 | 0x03)

#define PMK8350_ADC7_REF_GND			(PMK8350_SID << 8 | ADC7_REF_GND)

#define PMK8350_ADC7_1P25VREF			(PMK8350_SID << 8 | ADC7_1P25VREF)

#define PMK8350_ADC7_VREF_VADC			(PMK8350_SID << 8 | ADC7_VREF_VADC)

#define PMK8350_ADC7_DIE_TEMP			(PMK8350_SID << 8 | ADC7_DIE_TEMP)



#define PMK8350_ADC7_AMUX_THM1			(PMK8350_SID << 8 | 0x04)

#define PMK8350_ADC7_AMUX_THM2			(PMK8350_SID << 8 | 0x05)

#define PMK8350_ADC7_AMUX_THM3			(PMK8350_SID << 8 | 0x06)

#define PMK8350_ADC7_AMUX_THM4			(PMK8350_SID << 8 | 0x07)

#define PMK8350_ADC7_AMUX_THM5			(PMK8350_SID << 8 | 0x08)

#define PMK8350_ADC7_AMUX_THM1			(PMK8350_SID << 8 | ADC7_AMUX_THM1)

#define PMK8350_ADC7_AMUX_THM2			(PMK8350_SID << 8 | ADC7_AMUX_THM2)

#define PMK8350_ADC7_AMUX_THM3			(PMK8350_SID << 8 | ADC7_AMUX_THM3)

#define PMK8350_ADC7_AMUX_THM4			(PMK8350_SID << 8 | ADC7_AMUX_THM4)

#define PMK8350_ADC7_AMUX_THM5			(PMK8350_SID << 8 | ADC7_AMUX_THM5)



/* 30k pull-up1 */

#define PMK8350_ADC7_AMUX_THM1_30K_PU		(PMK8350_SID << 8 | 0x24)

#define PMK8350_ADC7_AMUX_THM2_30K_PU		(PMK8350_SID << 8 | 0x25)

#define PMK8350_ADC7_AMUX_THM3_30K_PU		(PMK8350_SID << 8 | 0x26)

#define PMK8350_ADC7_AMUX_THM4_30K_PU		(PMK8350_SID << 8 | 0x27)

#define PMK8350_ADC7_AMUX_THM5_30K_PU		(PMK8350_SID << 8 | 0x28)

#define PMK8350_ADC7_AMUX_THM1_30K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM1_30K_PU)

#define PMK8350_ADC7_AMUX_THM2_30K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM2_30K_PU)

#define PMK8350_ADC7_AMUX_THM3_30K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM3_30K_PU)

#define PMK8350_ADC7_AMUX_THM4_30K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM4_30K_PU)

#define PMK8350_ADC7_AMUX_THM5_30K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM5_30K_PU)



/* 100k pull-up2 */

#define PMK8350_ADC7_AMUX_THM1_100K_PU		(PMK8350_SID << 8 | 0x44)

#define PMK8350_ADC7_AMUX_THM2_100K_PU		(PMK8350_SID << 8 | 0x45)

#define PMK8350_ADC7_AMUX_THM3_100K_PU		(PMK8350_SID << 8 | 0x46)

#define PMK8350_ADC7_AMUX_THM4_100K_PU		(PMK8350_SID << 8 | 0x47)

#define PMK8350_ADC7_AMUX_THM5_100K_PU		(PMK8350_SID << 8 | 0x48)

#define PMK8350_ADC7_AMUX_THM1_100K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM1_100K_PU)

#define PMK8350_ADC7_AMUX_THM2_100K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM2_100K_PU)

#define PMK8350_ADC7_AMUX_THM3_100K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM3_100K_PU)

#define PMK8350_ADC7_AMUX_THM4_100K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM4_100K_PU)

#define PMK8350_ADC7_AMUX_THM5_100K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM5_100K_PU)



/* 400k pull-up3 */

#define PMK8350_ADC7_AMUX_THM1_400K_PU		(PMK8350_SID << 8 | 0x64)

#define PMK8350_ADC7_AMUX_THM2_400K_PU		(PMK8350_SID << 8 | 0x65)

#define PMK8350_ADC7_AMUX_THM3_400K_PU		(PMK8350_SID << 8 | 0x66)

#define PMK8350_ADC7_AMUX_THM4_400K_PU		(PMK8350_SID << 8 | 0x67)

#define PMK8350_ADC7_AMUX_THM5_400K_PU		(PMK8350_SID << 8 | 0x68)

#define PMK8350_ADC7_AMUX_THM1_400K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM1_400K_PU)

#define PMK8350_ADC7_AMUX_THM2_400K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM2_400K_PU)

#define PMK8350_ADC7_AMUX_THM3_400K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM3_400K_PU)

#define PMK8350_ADC7_AMUX_THM4_400K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM4_400K_PU)

#define PMK8350_ADC7_AMUX_THM5_400K_PU		(PMK8350_SID << 8 | ADC7_AMUX_THM5_400K_PU)



#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H */

include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h

+12 −10
Original line number Diff line number Diff line
@@ -10,19 +10,21 @@ 
#define PMR735A_SID					4

#endif



#include <dt-bindings/iio/qcom,spmi-vadc.h>



/* ADC channels for PMR735A_ADC for PMIC7 */

#define PMR735A_ADC7_REF_GND			(PMR735A_SID << 8 | 0x0)

#define PMR735A_ADC7_1P25VREF			(PMR735A_SID << 8 | 0x01)

#define PMR735A_ADC7_VREF_VADC			(PMR735A_SID << 8 | 0x02)

#define PMR735A_ADC7_DIE_TEMP			(PMR735A_SID << 8 | 0x03)

#define PMR735A_ADC7_REF_GND			(PMR735A_SID << 8 | ADC7_REF_GND)

#define PMR735A_ADC7_1P25VREF			(PMR735A_SID << 8 | ADC7_1P25VREF)

#define PMR735A_ADC7_VREF_VADC			(PMR735A_SID << 8 | ADC7_VREF_VADC)

#define PMR735A_ADC7_DIE_TEMP			(PMR735A_SID << 8 | ADC7_DIE_TEMP)



#define PMR735A_ADC7_GPIO1			(PMR735A_SID << 8 | 0x0a)

#define PMR735A_ADC7_GPIO2			(PMR735A_SID << 8 | 0x0b)

#define PMR735A_ADC7_GPIO3			(PMR735A_SID << 8 | 0x0c)

#define PMR735A_ADC7_GPIO1			(PMR735A_SID << 8 | ADC7_GPIO1)

#define PMR735A_ADC7_GPIO2			(PMR735A_SID << 8 | ADC7_GPIO2)

#define PMR735A_ADC7_GPIO3			(PMR735A_SID << 8 | ADC7_GPIO3)



/* 100k pull-up2 */

#define PMR735A_ADC7_GPIO1_100K_PU		(PMR735A_SID << 8 | 0x4a)

#define PMR735A_ADC7_GPIO2_100K_PU		(PMR735A_SID << 8 | 0x4b)

#define PMR735A_ADC7_GPIO3_100K_PU		(PMR735A_SID << 8 | 0x4c)

#define PMR735A_ADC7_GPIO1_100K_PU		(PMR735A_SID << 8 | ADC7_GPIO1_100K_PU)

#define PMR735A_ADC7_GPIO2_100K_PU		(PMR735A_SID << 8 | ADC7_GPIO2_100K_PU)

#define PMR735A_ADC7_GPIO3_100K_PU		(PMR735A_SID << 8 | ADC7_GPIO3_100K_PU)



#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H */

include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h

+12 −10
Original line number Diff line number Diff line
@@ -10,19 +10,21 @@ 
#define PMR735B_SID					5

#endif



#include <dt-bindings/iio/qcom,spmi-vadc.h>



/* ADC channels for PMR735B_ADC for PMIC7 */

#define PMR735B_ADC7_REF_GND			(PMR735B_SID << 8 | 0x0)

#define PMR735B_ADC7_1P25VREF			(PMR735B_SID << 8 | 0x01)

#define PMR735B_ADC7_VREF_VADC			(PMR735B_SID << 8 | 0x02)

#define PMR735B_ADC7_DIE_TEMP			(PMR735B_SID << 8 | 0x03)

#define PMR735B_ADC7_REF_GND			(PMR735B_SID << 8 | ADC7_REF_GND)

#define PMR735B_ADC7_1P25VREF			(PMR735B_SID << 8 | ADC7_1P25VREF)

#define PMR735B_ADC7_VREF_VADC			(PMR735B_SID << 8 | ADC7_VREF_VADC)

#define PMR735B_ADC7_DIE_TEMP			(PMR735B_SID << 8 | ADC7_DIE_TEMP)



#define PMR735B_ADC7_GPIO1			(PMR735B_SID << 8 | 0x0a)

#define PMR735B_ADC7_GPIO2			(PMR735B_SID << 8 | 0x0b)

#define PMR735B_ADC7_GPIO3			(PMR735B_SID << 8 | 0x0c)

#define PMR735B_ADC7_GPIO1			(PMR735B_SID << 8 | ADC7_GPIO1)

#define PMR735B_ADC7_GPIO2			(PMR735B_SID << 8 | ADC7_GPIO2)

#define PMR735B_ADC7_GPIO3			(PMR735B_SID << 8 | ADC7_GPIO3)



/* 100k pull-up2 */

#define PMR735B_ADC7_GPIO1_100K_PU		(PMR735B_SID << 8 | 0x4a)

#define PMR735B_ADC7_GPIO2_100K_PU		(PMR735B_SID << 8 | 0x4b)

#define PMR735B_ADC7_GPIO3_100K_PU		(PMR735B_SID << 8 | 0x4c)

#define PMR735B_ADC7_GPIO1_100K_PU		(PMR735B_SID << 8 | ADC7_GPIO1_100K_PU)

#define PMR735B_ADC7_GPIO2_100K_PU		(PMR735B_SID << 8 | ADC7_GPIO2_100K_PU)

#define PMR735B_ADC7_GPIO3_100K_PU		(PMR735B_SID << 8 | ADC7_GPIO3_100K_PU)



#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H */