Commit b744af11 authored by Niklas Söderlund's avatar Niklas Söderlund Committed by Daniel Lezcano
Browse files

thermal: rcar_gen3: Use lowercase hex constants 



The style of the driver is to use lowercase hex constants, correct the
few outlines.

Signed-off-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250305174631.4119374-2-niklas.soderlund+renesas@ragnatech.se


Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent 5ad72c2b

drivers/thermal/renesas/rcar_gen3_thermal.c

+8 −8
Original line number Diff line number Diff line
@@ -21,11 +21,11 @@ 
/* Register offsets */

#define REG_GEN3_IRQSTR		0x04

#define REG_GEN3_IRQMSK		0x08

#define REG_GEN3_IRQCTL		0x0C

#define REG_GEN3_IRQCTL		0x0c

#define REG_GEN3_IRQEN		0x10

#define REG_GEN3_IRQTEMP1	0x14

#define REG_GEN3_IRQTEMP2	0x18

#define REG_GEN3_IRQTEMP3	0x1C

#define REG_GEN3_IRQTEMP3	0x1c

#define REG_GEN3_THCTR		0x20

#define REG_GEN3_TEMP		0x28

#define REG_GEN3_THCODE1	0x50
@@ -38,9 +38,9 @@ 
#define REG_GEN4_THSFMON00	0x180

#define REG_GEN4_THSFMON01	0x184

#define REG_GEN4_THSFMON02	0x188

#define REG_GEN4_THSFMON15	0x1BC

#define REG_GEN4_THSFMON16	0x1C0

#define REG_GEN4_THSFMON17	0x1C4

#define REG_GEN4_THSFMON15	0x1bc

#define REG_GEN4_THSFMON16	0x1c0

#define REG_GEN4_THSFMON17	0x1c4



/* IRQ{STR,MSK,EN} bits */

#define IRQ_TEMP1		BIT(0)
@@ -57,11 +57,11 @@ 
/* THSCP bits */

#define THSCP_COR_PARA_VLD	(BIT(15) | BIT(14))



#define CTEMP_MASK	0xFFF

#define CTEMP_MASK	0xfff



#define MCELSIUS(temp)	((temp) * 1000)

#define GEN3_FUSE_MASK	0xFFF

#define GEN4_FUSE_MASK	0xFFF

#define GEN3_FUSE_MASK	0xfff

#define GEN4_FUSE_MASK	0xfff



#define TSC_MAX_NUM	5