Commit b747fa22 authored by Frank Wunderlich's avatar Frank Wunderlich Committed by Matthias Brugger
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arm64: dts: mediatek: mt2712e: swap last 2 clocks to match binding



First 3 clocks for mt2712 need to be "source", "hclk", "source_cg"
so swap last 2 of mmc0 to match the binding.

Signed-off-by: default avatarFrank Wunderlich <frank-w@public-files.de>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221025132953.81286-4-linux@fw-web.de


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent db962d0d
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+3 −3
Original line number Diff line number Diff line
@@ -766,9 +766,9 @@ mmc0: mmc@11230000 {
		interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_LOW>;
		clocks = <&pericfg CLK_PERI_MSDC30_0>,
			 <&pericfg CLK_PERI_MSDC50_0_HCLK_EN>,
			 <&pericfg CLK_PERI_MSDC30_0_QTR_EN>,
			 <&pericfg CLK_PERI_MSDC50_0_EN>;
		clock-names = "source", "hclk", "bus_clk", "source_cg";
			 <&pericfg CLK_PERI_MSDC50_0_EN>,
			 <&pericfg CLK_PERI_MSDC30_0_QTR_EN>;
		clock-names = "source", "hclk", "source_cg", "bus_clk";
		status = "disabled";
	};