Commit b78956dc authored by Yuanjie Yang's avatar Yuanjie Yang Committed by Dmitry Baryshkov
Browse files

drm/msm/dpu: Add interrupt registers for DPU 13.0.0



DPU version 13.0.0 introduces changes to the interrupt register
layout. Update the driver to support these modifications for
proper interrupt handling.

Co-developed-by: default avatarYongxing Mou <yongxing.mou@oss.qualcomm.com>
Signed-off-by: default avatarYongxing Mou <yongxing.mou@oss.qualcomm.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: default avatarYuanjie Yang <yuanjie.yang@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/698708/
Link: https://lore.kernel.org/r/20260115092749.533-9-yuanjie.yang@oss.qualcomm.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
parent 2482c6f9
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+88 −1
Original line number Diff line number Diff line
@@ -40,6 +40,15 @@
#define MDP_INTF_REV_7xxx_INTR_TEAR_STATUS(intf)	(MDP_INTF_REV_7xxx_TEAR_OFF(intf) + 0x004)
#define MDP_INTF_REV_7xxx_INTR_TEAR_CLEAR(intf)		(MDP_INTF_REV_7xxx_TEAR_OFF(intf) + 0x008)

#define MDP_INTF_REV_13xx_OFF(intf)			(0x18d000 + 0x1000 * (intf))
#define MDP_INTF_REV_13xx_INTR_EN(intf)			(MDP_INTF_REV_13xx_OFF(intf) + 0x1c0)
#define MDP_INTF_REV_13xx_INTR_STATUS(intf)		(MDP_INTF_REV_13xx_OFF(intf) + 0x1c4)
#define MDP_INTF_REV_13xx_INTR_CLEAR(intf)		(MDP_INTF_REV_13xx_OFF(intf) + 0x1c8)
#define MDP_INTF_REV_13xx_TEAR_OFF(intf)		(0x18d800 + 0x1000 * (intf))
#define MDP_INTF_REV_13xx_INTR_TEAR_EN(intf)		(MDP_INTF_REV_13xx_TEAR_OFF(intf) + 0x000)
#define MDP_INTF_REV_13xx_INTR_TEAR_STATUS(intf)	(MDP_INTF_REV_13xx_TEAR_OFF(intf) + 0x004)
#define MDP_INTF_REV_13xx_INTR_TEAR_CLEAR(intf)		(MDP_INTF_REV_13xx_TEAR_OFF(intf) + 0x008)

/**
 * struct dpu_intr_reg - array of DPU register sets
 * @clr_off:	offset to CLEAR reg
@@ -199,6 +208,82 @@ static const struct dpu_intr_reg dpu_intr_set_7xxx[] = {
	},
};

/*
 * dpu_intr_set_13xx -  List of DPU interrupt registers for DPU >= 13.0
 */
static const struct dpu_intr_reg dpu_intr_set_13xx[] = {
	[MDP_SSPP_TOP0_INTR] = {
		INTR_CLEAR,
		INTR_EN,
		INTR_STATUS
	},
	[MDP_SSPP_TOP0_INTR2] = {
		INTR2_CLEAR,
		INTR2_EN,
		INTR2_STATUS
	},
	[MDP_SSPP_TOP0_HIST_INTR] = {
		HIST_INTR_CLEAR,
		HIST_INTR_EN,
		HIST_INTR_STATUS
	},
	[MDP_INTF0_INTR] = {
		MDP_INTF_REV_13xx_INTR_CLEAR(0),
		MDP_INTF_REV_13xx_INTR_EN(0),
		MDP_INTF_REV_13xx_INTR_STATUS(0)
	},
	[MDP_INTF1_INTR] = {
		MDP_INTF_REV_13xx_INTR_CLEAR(1),
		MDP_INTF_REV_13xx_INTR_EN(1),
		MDP_INTF_REV_13xx_INTR_STATUS(1)
	},
	[MDP_INTF1_TEAR_INTR] = {
		MDP_INTF_REV_13xx_INTR_TEAR_CLEAR(1),
		MDP_INTF_REV_13xx_INTR_TEAR_EN(1),
		MDP_INTF_REV_13xx_INTR_TEAR_STATUS(1)
	},
	[MDP_INTF2_INTR] = {
		MDP_INTF_REV_13xx_INTR_CLEAR(2),
		MDP_INTF_REV_13xx_INTR_EN(2),
		MDP_INTF_REV_13xx_INTR_STATUS(2)
	},
	[MDP_INTF2_TEAR_INTR] = {
		MDP_INTF_REV_13xx_INTR_TEAR_CLEAR(2),
		MDP_INTF_REV_13xx_INTR_TEAR_EN(2),
		MDP_INTF_REV_13xx_INTR_TEAR_STATUS(2)
	},
	[MDP_INTF3_INTR] = {
		MDP_INTF_REV_13xx_INTR_CLEAR(3),
		MDP_INTF_REV_13xx_INTR_EN(3),
		MDP_INTF_REV_13xx_INTR_STATUS(3)
	},
	[MDP_INTF4_INTR] = {
		MDP_INTF_REV_13xx_INTR_CLEAR(4),
		MDP_INTF_REV_13xx_INTR_EN(4),
		MDP_INTF_REV_13xx_INTR_STATUS(4)
	},
	[MDP_INTF5_INTR] = {
		MDP_INTF_REV_13xx_INTR_CLEAR(5),
		MDP_INTF_REV_13xx_INTR_EN(5),
		MDP_INTF_REV_13xx_INTR_STATUS(5)
	},
	[MDP_INTF6_INTR] = {
		MDP_INTF_REV_13xx_INTR_CLEAR(6),
		MDP_INTF_REV_13xx_INTR_EN(6),
		MDP_INTF_REV_13xx_INTR_STATUS(6)
	},
	[MDP_INTF7_INTR] = {
		MDP_INTF_REV_13xx_INTR_CLEAR(7),
		MDP_INTF_REV_13xx_INTR_EN(7),
		MDP_INTF_REV_13xx_INTR_STATUS(7)
	},
	[MDP_INTF8_INTR] = {
		MDP_INTF_REV_13xx_INTR_CLEAR(8),
		MDP_INTF_REV_13xx_INTR_EN(8),
		MDP_INTF_REV_13xx_INTR_STATUS(8)
	},
};

#define DPU_IRQ_MASK(irq_idx)	(BIT(DPU_IRQ_BIT(irq_idx)))

static inline bool dpu_core_irq_is_valid(unsigned int irq_idx)
@@ -507,7 +592,9 @@ struct dpu_hw_intr *dpu_hw_intr_init(struct drm_device *dev,
	if (!intr)
		return ERR_PTR(-ENOMEM);

	if (m->mdss_ver->core_major_ver >= 7)
	if (m->mdss_ver->core_major_ver >= 13)
		intr->intr_set = dpu_intr_set_13xx;
	else if (m->mdss_ver->core_major_ver >= 7)
		intr->intr_set = dpu_intr_set_7xxx;
	else
		intr->intr_set = dpu_intr_set_legacy;