Loading include/sound/ad1848.h +1 −1 Original line number Diff line number Diff line Loading @@ -48,7 +48,7 @@ #define AD1848_IFACE_CTRL 0x09 /* interface control - bits 7-2 MCE */ #define AD1848_PIN_CTRL 0x0a /* pin control */ #define AD1848_TEST_INIT 0x0b /* test and initialization */ #define AD1848_MISC_INFO 0x0c /* miscellaneaous information */ #define AD1848_MISC_INFO 0x0c /* miscellaneous information */ #define AD1848_LOOPBACK 0x0d /* loopback control */ #define AD1848_DATA_UPR_CNT 0x0e /* playback/capture upper base count */ #define AD1848_DATA_LWR_CNT 0x0f /* playback/capture lower base count */ Loading include/sound/cs4231-regs.h +1 −1 Original line number Diff line number Diff line Loading @@ -45,7 +45,7 @@ #define CS4231_IFACE_CTRL 0x09 /* interface control - bits 7-2 MCE */ #define CS4231_PIN_CTRL 0x0a /* pin control */ #define CS4231_TEST_INIT 0x0b /* test and initialization */ #define CS4231_MISC_INFO 0x0c /* miscellaneaous information */ #define CS4231_MISC_INFO 0x0c /* miscellaneous information */ #define CS4231_LOOPBACK 0x0d /* loopback control */ #define CS4231_PLY_UPR_CNT 0x0e /* playback upper base count */ #define CS4231_PLY_LWR_CNT 0x0f /* playback lower base count */ Loading include/sound/soc-dapm.h +1 −1 Original line number Diff line number Diff line Loading @@ -22,7 +22,7 @@ #define SND_SOC_NOPM -1 /* * SoC dynamic audio power managment * SoC dynamic audio power management * * We can have upto 4 power domains * 1. Codec domain - VREF, VMID Loading Loading
include/sound/ad1848.h +1 −1 Original line number Diff line number Diff line Loading @@ -48,7 +48,7 @@ #define AD1848_IFACE_CTRL 0x09 /* interface control - bits 7-2 MCE */ #define AD1848_PIN_CTRL 0x0a /* pin control */ #define AD1848_TEST_INIT 0x0b /* test and initialization */ #define AD1848_MISC_INFO 0x0c /* miscellaneaous information */ #define AD1848_MISC_INFO 0x0c /* miscellaneous information */ #define AD1848_LOOPBACK 0x0d /* loopback control */ #define AD1848_DATA_UPR_CNT 0x0e /* playback/capture upper base count */ #define AD1848_DATA_LWR_CNT 0x0f /* playback/capture lower base count */ Loading
include/sound/cs4231-regs.h +1 −1 Original line number Diff line number Diff line Loading @@ -45,7 +45,7 @@ #define CS4231_IFACE_CTRL 0x09 /* interface control - bits 7-2 MCE */ #define CS4231_PIN_CTRL 0x0a /* pin control */ #define CS4231_TEST_INIT 0x0b /* test and initialization */ #define CS4231_MISC_INFO 0x0c /* miscellaneaous information */ #define CS4231_MISC_INFO 0x0c /* miscellaneous information */ #define CS4231_LOOPBACK 0x0d /* loopback control */ #define CS4231_PLY_UPR_CNT 0x0e /* playback upper base count */ #define CS4231_PLY_LWR_CNT 0x0f /* playback lower base count */ Loading
include/sound/soc-dapm.h +1 −1 Original line number Diff line number Diff line Loading @@ -22,7 +22,7 @@ #define SND_SOC_NOPM -1 /* * SoC dynamic audio power managment * SoC dynamic audio power management * * We can have upto 4 power domains * 1. Codec domain - VREF, VMID Loading