Commit b7ecb51b authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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arm64: dts: renesas: r8a774e1: Add PCIe EP nodes

parent e9f0fb53
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+38 −0
Original line number Diff line number Diff line
@@ -2468,6 +2468,44 @@ pciec1: pcie@ee800000 {
			status = "disabled";
		};

		pciec0_ep: pcie-ep@fe000000 {
			compatible = "renesas,r8a774e1-pcie-ep",
				     "renesas,rcar-gen3-pcie-ep";
			reg = <0x0 0xfe000000 0 0x80000>,
			      <0x0 0xfe100000 0 0x100000>,
			      <0x0 0xfe200000 0 0x200000>,
			      <0x0 0x30000000 0 0x8000000>,
			      <0x0 0x38000000 0 0x8000000>;
			reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 319>;
			clock-names = "pcie";
			resets = <&cpg 319>;
			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
			status = "disabled";
		};

		pciec1_ep: pcie-ep@ee800000 {
			compatible = "renesas,r8a774e1-pcie-ep",
				     "renesas,rcar-gen3-pcie-ep";
			reg = <0x0 0xee800000 0 0x80000>,
			      <0x0 0xee900000 0 0x100000>,
			      <0x0 0xeea00000 0 0x200000>,
			      <0x0 0xc0000000 0 0x8000000>,
			      <0x0 0xc8000000 0 0x8000000>;
			reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 318>;
			clock-names = "pcie";
			resets = <&cpg 318>;
			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
			status = "disabled";
		};

		vspbc: vsp@fe920000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfe920000 0 0x8000>;