Commit b830ebc9 authored by Harry Wentland's avatar Harry Wentland Committed by Alex Deucher
Browse files

drm/amd/display: Fix ckeckpatch problems in amdgpu_dm

parent e7b07cee
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+94 −85
Original line number Diff line number Diff line
@@ -1684,8 +1684,7 @@ static int dm_crtc_cursor_set(
	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
	ret = EINVAL;

	DRM_DEBUG_KMS(
		"%s: crtc_id=%d with size %d to %d \n",
	DRM_DEBUG_KMS("%s: crtc_id=%d with size %d to %d \n",
		      __func__,
		      amdgpu_crtc->crtc_id,
		      width,
@@ -1839,6 +1838,7 @@ static int get_fb_info(
{
	struct amdgpu_bo *rbo = gem_to_amdgpu_bo(amdgpu_fb->obj);
	int r = amdgpu_bo_reserve(rbo, false);

	if (unlikely(r)) {
		DRM_ERROR("Unable to reserve buffer\n");
		return r;
@@ -1946,10 +1946,9 @@ static int fill_plane_attributes_from_fb(

	memset(&surface->tiling_info, 0, sizeof(surface->tiling_info));

	/* Fill GFX params */
	if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == DC_ARRAY_2D_TILED_THIN1)
	{
		unsigned bankw, bankh, mtaspect, tile_split, num_banks;
	/* Fill GFX8 params */
	if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == DC_ARRAY_2D_TILED_THIN1) {
		unsigned int bankw, bankh, mtaspect, tile_split, num_banks;

		bankw = AMDGPU_TILING_GET(tiling_flags, BANK_WIDTH);
		bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT);
@@ -2162,7 +2161,8 @@ static enum dc_color_depth convert_color_depth_from_display_info(
	uint32_t bpc = connector->display_info.bpc;

	/* Limited color depth to 8bit
	 * TODO: Still need to handle deep color*/
	 * TODO: Still need to handle deep color
	 */
	if (bpc > 8)
		bpc = 8;

@@ -2195,6 +2195,7 @@ static enum dc_aspect_ratio get_aspect_ratio(
{
	int32_t width = mode_in->crtc_hdisplay * 9;
	int32_t height = mode_in->crtc_vdisplay * 16;

	if ((width - height) < 10 && (width - height) > -10)
		return ASPECT_RATIO_16_9;
	else
@@ -2252,6 +2253,7 @@ static void fill_stream_properties_from_drm_display_mode(
	const struct drm_connector *connector)
{
	struct dc_crtc_timing *timing_out = &stream->timing;

	memset(timing_out, 0, sizeof(struct dc_crtc_timing));

	timing_out->h_border_left = 0;
@@ -2296,6 +2298,7 @@ static void fill_stream_properties_from_drm_display_mode(

	{
		struct dc_transfer_func *tf = dc_create_transfer_func();

		tf->type = TF_TYPE_PREDEFINED;
		tf->tf = TRANSFER_FUNCTION_SRGB;
		stream->out_transfer_func = tf;
@@ -2397,12 +2400,12 @@ static struct dc_stream *create_stream_for_sink(
	struct drm_display_mode mode = *drm_mode;
	bool native_mode_found = false;

	if (NULL == aconnector) {
	if (aconnector == NULL) {
		DRM_ERROR("aconnector is NULL!\n");
		goto drm_connector_null;
	}

	if (NULL == dm_state) {
	if (dm_state == NULL) {
		DRM_ERROR("dm_state is NULL!\n");
		goto dm_state_null;
	}
@@ -2410,7 +2413,7 @@ static struct dc_stream *create_stream_for_sink(
	drm_connector = &aconnector->base;
	stream = dc_create_stream_for_sink(aconnector->dc_sink);

	if (NULL == stream) {
	if (stream == NULL) {
		DRM_ERROR("Failed to create stream for sink!\n");
		goto stream_create_fail;
	}
@@ -2428,7 +2431,7 @@ static struct dc_stream *create_stream_for_sink(
				struct drm_display_mode,
				head);

	if (NULL == preferred_mode) {
	if (preferred_mode == NULL) {
		/* This may not be an error, the use case is when we we have no
		 * usermode calls to reset and set mode upon hotplug. In this
		 * case, we call set mode ourselves to restore the previous mode
@@ -2818,13 +2821,13 @@ int amdgpu_dm_connector_mode_valid(

	dc_sink = to_amdgpu_connector(connector)->dc_sink;

	if (NULL == dc_sink) {
	if (dc_sink == NULL) {
		DRM_ERROR("dc_sink is NULL!\n");
		goto fail;
	}

	stream = dc_create_stream_for_sink(dc_sink);
	if (NULL == stream) {
	if (stream == NULL) {
		DRM_ERROR("Failed to create stream for sink!\n");
		goto fail;
	}
@@ -3064,11 +3067,11 @@ static void dm_plane_helper_cleanup_fb(
	if (unlikely(r)) {
		DRM_ERROR("failed to reserve rbo before unpin\n");
		return;
	} else {
	}

	amdgpu_bo_unpin(rbo);
	amdgpu_bo_unreserve(rbo);
	amdgpu_bo_unref(&rbo);
	};
}

int dm_create_validation_set_for_connector(struct drm_connector *connector,
@@ -3084,14 +3087,14 @@ int dm_create_validation_set_for_connector(struct drm_connector *connector,
			(mode->flags & DRM_MODE_FLAG_DBLSCAN))
		return result;

	if (NULL == dc_sink) {
	if (dc_sink == NULL) {
		DRM_ERROR("dc_sink is NULL!\n");
		return result;
	}

	stream = dc_create_stream_for_sink(dc_sink);

	if (NULL == stream) {
	if (stream == NULL) {
		DRM_ERROR("Failed to create stream for sink!\n");
		return result;
	}
@@ -3230,9 +3233,7 @@ int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
	return 0;

fail:
	if (acrtc)
	kfree(acrtc);
	if (cursor_plane)
	kfree(cursor_plane);
	acrtc->crtc_id = -1;
	return res;
@@ -3280,12 +3281,13 @@ static void amdgpu_dm_get_native_mode(struct drm_connector *connector)

	if (!list_empty(&connector->probed_modes)) {
		struct drm_display_mode *preferred_mode = NULL;

		list_for_each_entry(preferred_mode,
				    &connector->probed_modes,
				    head) {
		if (preferred_mode->type & DRM_MODE_TYPE_PREFERRED) {
			if (preferred_mode->type & DRM_MODE_TYPE_PREFERRED)
				amdgpu_encoder->native_mode = *preferred_mode;
		}

			break;
		}

@@ -3343,7 +3345,7 @@ static void amdgpu_dm_connector_add_common_modes(struct drm_encoder *encoder,
		{"1920x1200", 1920, 1200}
	};

	n = sizeof(common_modes) / sizeof(common_modes[0]);
	n = ARRAY_SIZE(common_modes);

	for (i = 0; i < n; i++) {
		struct drm_display_mode *curmode = NULL;
@@ -3429,8 +3431,9 @@ void amdgpu_dm_connector_init_helper(

	mutex_init(&aconnector->hpd_lock);

	/*configure suport HPD hot plug connector_>polled default value is 0
	 * which means HPD hot plug not supported*/
	/* configure support HPD hot plug connector_>polled default value is 0
	 * which means HPD hot plug not supported
	 */
	switch (connector_type) {
	case DRM_MODE_CONNECTOR_HDMIA:
		aconnector->base.polled = DRM_CONNECTOR_POLL_HPD;
@@ -3470,7 +3473,7 @@ int amdgpu_dm_i2c_xfer(struct i2c_adapter *i2c_adap,
	int i;
	int result = -EIO;

	cmd.payloads = kzalloc(num * sizeof(struct i2c_payload), GFP_KERNEL);
	cmd.payloads = kcalloc(num, sizeof(struct i2c_payload), GFP_KERNEL);

	if (!cmd.payloads)
		return result;
@@ -3527,7 +3530,8 @@ static struct amdgpu_i2c_adapter *create_i2c(
}

/* Note: this function assumes that dc_link_detect() was called for the
 * dc_link which will be represented by this aconnector. */
 * dc_link which will be represented by this aconnector.
 */
int amdgpu_dm_connector_init(
	struct amdgpu_display_manager *dm,
	struct amdgpu_connector *aconnector,
@@ -3599,7 +3603,8 @@ int amdgpu_dm_connector_init(
	if (link->connector_signal & (SIGNAL_TYPE_EDP | SIGNAL_TYPE_LVDS)) {
		/* Event if registration failed, we should continue with
		 * DM initialization because not having a backlight control
		 * is better then a black screen. */
		 * is better then a black screen.
		 */
		amdgpu_dm_register_backlight_device(dm);

		if (dm->backlight_dev)
@@ -3701,8 +3706,8 @@ static bool is_scaling_state_different(
	} else  if (dm_state->underscan_enable && !old_dm_state->underscan_enable) {
		if (dm_state->underscan_hborder != 0 && dm_state->underscan_vborder != 0)
			return true;
	} else if (dm_state->underscan_hborder != old_dm_state->underscan_hborder
				|| dm_state->underscan_vborder != old_dm_state->underscan_vborder)
	} else if (dm_state->underscan_hborder != old_dm_state->underscan_hborder ||
		   dm_state->underscan_vborder != old_dm_state->underscan_vborder)
		return true;
	return false;
}
@@ -3798,7 +3803,7 @@ static void amdgpu_dm_do_flip(
	 * explicitly on fences instead
	 * and in general should be called for
	 * blocking commit to as per framework helpers
	 * */
	 */
	r = amdgpu_bo_reserve(abo, true);
	if (unlikely(r != 0)) {
		DRM_ERROR("failed to reserve buffer before flip\n");
@@ -3897,7 +3902,7 @@ static void amdgpu_dm_commit_surfaces(struct drm_atomic_state *state,
			DRM_ERROR("add_surface: acrtc %d, already busy\n",
					acrtc_attach->crtc_id);
			spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
			/* In comit tail framework this cannot happen */
			/* In commit tail framework this cannot happen */
			WARN_ON(1);
		}
		spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
@@ -4016,6 +4021,7 @@ void amdgpu_dm_atomic_commit_tail(
	for_each_crtc_in_state(state, crtc, old_crtc_state, i) {
		struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
		struct drm_crtc_state *new_state = crtc->state;

		new_acrtc_state = to_dm_crtc_state(new_state);
		old_acrtc_state = to_dm_crtc_state(old_crtc_state);

@@ -4097,6 +4103,7 @@ void amdgpu_dm_atomic_commit_tail(
	if (adev->dm.freesync_module) {
		for (i = 0; i < new_crtcs_count; i++) {
			struct amdgpu_connector *aconnector = NULL;

			new_acrtc_state = to_dm_crtc_state(new_crtcs[i]->base.state);

			new_stream = new_acrtc_state->stream;
@@ -4106,8 +4113,7 @@ void amdgpu_dm_atomic_commit_tail(
					&new_crtcs[i]->base,
					false);
			if (!aconnector) {
				DRM_INFO(
						"Atomic commit: Failed to find connector for acrtc id:%d "
				DRM_INFO("Atomic commit: Failed to find connector for acrtc id:%d "
					 "skipping freesync init\n",
					 new_crtcs[i]->crtc_id);
				continue;
@@ -4124,6 +4130,7 @@ void amdgpu_dm_atomic_commit_tail(

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

		new_acrtc_state = to_dm_crtc_state(crtc->state);

		if (new_acrtc_state->stream != NULL) {
@@ -4181,6 +4188,7 @@ void amdgpu_dm_atomic_commit_tail(
		 * loop to enable interrupts on newly arrived crtc
		 */
		struct amdgpu_crtc *acrtc = new_crtcs[i];

		new_acrtc_state = to_dm_crtc_state(acrtc->base.state);

		if (adev->dm.freesync_module)
@@ -4375,9 +4383,8 @@ static uint32_t remove_from_val_sets(

	set_count--;

	for (; i < set_count; i++) {
	for (; i < set_count; i++)
		val_sets[i] = val_sets[i + 1];
	}

	return set_count;
}
@@ -4483,6 +4490,7 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
	for_each_crtc_in_state(state, crtc, crtc_state, i) {
		struct amdgpu_crtc *acrtc = NULL;
		struct amdgpu_connector *aconnector = NULL;

		old_acrtc_state = to_dm_crtc_state(crtc->state);
		new_acrtc_state = to_dm_crtc_state(crtc_state);
		acrtc = to_amdgpu_crtc(crtc);
@@ -4591,7 +4599,7 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
		if (!acrtc || drm_atomic_crtc_needs_modeset(acrtc->base.state))
			continue;

		/* Skip any thing not scale or underscan chnages */
		/* Skip any thing not scale or underscan changes */
		if (!is_scaling_state_different(con_new_state, con_old_state))
			continue;

@@ -4724,6 +4732,7 @@ void amdgpu_dm_add_sink_to_freesync_module(

	struct drm_device *dev = connector->dev;
	struct amdgpu_device *adev = dev->dev_private;

	edid_check_required = false;
	if (!amdgpu_connector->dc_sink) {
		DRM_ERROR("dc_sink NULL, could not add free_sync module.\n");