Commit b86cba11 authored by Ovidiu Bunea's avatar Ovidiu Bunea Committed by Alex Deucher
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drm/amd/display: Revert "Add a config flag for limited_pll_vco" 



This reverts commit 82139760.

[why & how]
DMUB header changes should be submitted to firmware branch first and
allowed to propagate to driver. Currently, this change breaks linux
builds so need to revert it until it's ready.

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarOvidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: default avatarIvan Lipski <ivan.lipski@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 82139760

drivers/gpu/drm/amd/display/dmub/dmub_srv.h

+0 −1
Original line number Diff line number Diff line
@@ -316,7 +316,6 @@ struct dmub_srv_hw_params { 
	bool disable_sldo_opt;

	bool enable_non_transparent_setconfig;

	bool lower_hbr3_phy_ssc;

	bool override_hbr3_pll_vco;

};



/**

drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h

+1 −2
Original line number Diff line number Diff line
@@ -843,8 +843,7 @@ union dmub_fw_boot_options { 
		uint32_t ips_sequential_ono: 1; /**< 1 to enable sequential ONO IPS sequence */

		uint32_t disable_sldo_opt: 1; /**< 1 to disable SLDO optimizations */

		uint32_t lower_hbr3_phy_ssc: 1; /**< 1 to lower hbr3 phy ssc to 0.125 percent */

		uint32_t override_hbr3_pll_vco: 1; /**< 1 to override the hbr3 pll vco to 0 */

		uint32_t reserved : 5; /**< reserved */

		uint32_t reserved : 6; /**< reserved */

	} bits; /**< boot bits */

	uint32_t all; /**< 32-bit access to bits */

};

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c

+0 −1
Original line number Diff line number Diff line
@@ -377,7 +377,6 @@ void dmub_dcn31_enable_dmub_boot_options(struct dmub_srv *dmub, const struct dmu 
	boot_options.bits.dpia_hpd_int_enable_supported = params->dpia_hpd_int_enable_supported;

	boot_options.bits.power_optimization = params->power_optimization;

	boot_options.bits.lower_hbr3_phy_ssc = params->lower_hbr3_phy_ssc;

	boot_options.bits.override_hbr3_pll_vco = params->override_hbr3_pll_vco;



	boot_options.bits.sel_mux_phy_c_d_phy_f_g = (dmub->asic == DMUB_ASIC_DCN31B) ? 1 : 0;