Commit b8dd631f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'rproc-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux 

Pull remoteproc updates from Bjorn Andersson:
 "Support for controlling the second core in Mediatek's SCP dual-core
  setup is introduced.

  Support for audio, compute and modem DSPs on Qualcomm SM6375, and the
  audio DSP in SC7180 are introduced. The peripheral NoC clock is
  dropped from MSM8996 modem DSP, as this is handled through the
  interconnect provider.

  In the zynqmp driver the setup for TCM memory, and device address
  translation thereof, when operating in lockstep mode is corrected.

  A few bug fixes and cleanups are introduces across the ST and STM32
  remoteproc drivers"

* tag 'rproc-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (28 commits)
  remoteproc: st: Fix sometimes uninitialized ret in st_rproc_probe()
  remoteproc: st: Use device_get_match_data()
  remoteproc: zynqmp: Change tcm address translation method
  remoteproc: mediatek: Refactor single core check and fix retrocompatibility
  remoteproc: qcom: q6v5-mss: Remove PNoC clock from 8996 MSS
  dt-bindings: remoteproc: qcom,msm8996-mss-pil: Remove PNoC clock
  dt-bindings: remoteproc: qcom,adsp: Remove AGGRE2 clock
  remoteproc: qcom: pas: Add SM6375 MPSS
  remoteproc: qcom: pas: Add SM6375 ADSP & CDSP
  dt-bindings: remoteproc: qcom,sm6375-pas: Document remoteprocs
  dt-bindings: remoteproc: pru: Add Interrupt property
  remoteproc: qcom: pas: Add sc7180 adsp
  dt-bindings: remoteproc: qcom: sc7180-pas: Add ADSP compatible
  arm64: dts: mediatek: Update the node name of SCP rpmsg subnode
  remoteproc: zynqmp: fix TCM carveouts in lockstep mode
  remoteproc: mediatek: Refine ipi handler error message
  remoteproc: mediatek: Report watchdog crash to all cores
  remoteproc: mediatek: Handle MT8195 SCP core 1 watchdog timeout
  remoteproc: mediatek: Setup MT8195 SCP core 1 SRAM offset
  remoteproc: mediatek: Remove dependency of MT8195 SCP L2TCM power control on dual-core SCP
  ...
parents c87271ee 3d8a1869

Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml

+156 −20
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ properties: 
      - mediatek,mt8188-scp

      - mediatek,mt8192-scp

      - mediatek,mt8195-scp

      - mediatek,mt8195-scp-dual



  reg:

    description:
@@ -31,10 +32,7 @@ properties: 


  reg-names:

    minItems: 2

    items:

      - const: sram

      - const: cfg

      - const: l1tcm

    maxItems: 3



  clocks:

    description:
@@ -58,6 +56,93 @@ properties: 
  memory-region:

    maxItems: 1



  cros-ec-rpmsg:

    $ref: /schemas/mfd/google,cros-ec.yaml

    description:

      This subnode represents the rpmsg device. The properties

      of this node are defined by the individual bindings for

      the rpmsg devices.



    required:

      - mediatek,rpmsg-name



    unevaluatedProperties: false



  '#address-cells':

    const: 1



  '#size-cells':

    const: 1



  ranges:

    description:

      Standard ranges definition providing address translations for

      local SCP SRAM address spaces to bus addresses.



patternProperties:

  "^scp@[a-f0-9]+$":

    type: object

    description:

      The MediaTek SCP integrated to SoC might be a multi-core version.

      The other cores are represented as child nodes of the boot core.

      There are some integration differences for the IP like the usage of

      address translator for translating SoC bus addresses into address space

      for the processor.



      Each SCP core has own cache memory. The SRAM and L1TCM are shared by

      cores. The power of cache, SRAM and L1TCM power should be enabled

      before booting SCP cores. The size of cache, SRAM, and L1TCM are varied

      on differnt SoCs.



      The SCP cores do not use an MMU, but has a set of registers to

      control the translations between 32-bit CPU addresses into system bus

      addresses. Cache and memory access settings are provided through a

      Memory Protection Unit (MPU), programmable only from the SCP.



    properties:

      compatible:

        enum:

          - mediatek,scp-core



      reg:

        description: The base address and size of SRAM.

        maxItems: 1



      reg-names:

        const: sram



      interrupts:

        maxItems: 1



      firmware-name:

        $ref: /schemas/types.yaml#/definitions/string

        description:

          If present, name (or relative path) of the file within the

          firmware search path containing the firmware image used when

          initializing sub cores of multi-core SCP.



      memory-region:

        maxItems: 1



      cros-ec-rpmsg:

        $ref: /schemas/mfd/google,cros-ec.yaml

        description:

          This subnode represents the rpmsg device. The properties

          of this node are defined by the individual bindings for

          the rpmsg devices.



        required:

          - mediatek,rpmsg-name



        unevaluatedProperties: false



    required:

      - compatible

      - reg

      - reg-names



    additionalProperties: false



required:

  - compatible

  - reg
@@ -87,23 +172,39 @@ allOf: 
        reg:

          maxItems: 2

        reg-names:

          maxItems: 2



additionalProperties:

  type: object

  description:

    Subnodes of the SCP represent rpmsg devices. The names of the devices

    are not important. The properties of these nodes are defined by the

    individual bindings for the rpmsg devices.

          items:

            - const: sram

            - const: cfg

  - if:

      properties:

    mediatek,rpmsg-name:

      $ref: /schemas/types.yaml#/definitions/string-array

      description:

        Contains the name for the rpmsg device. Used to match

        the subnode to rpmsg device announced by SCP.

        compatible:

          enum:

            - mediatek,mt8192-scp

            - mediatek,mt8195-scp

    then:

      properties:

        reg:

          maxItems: 3

        reg-names:

          items:

            - const: sram

            - const: cfg

            - const: l1tcm

  - if:

      properties:

        compatible:

          enum:

            - mediatek,mt8195-scp-dual

    then:

      properties:

        reg:

          maxItems: 2

        reg-names:

          items:

            - const: cfg

            - const: l1tcm



  required:

    - mediatek,rpmsg-name

additionalProperties: false



examples:

  - |
@@ -118,7 +219,42 @@ examples: 
        clocks = <&infracfg CLK_INFRA_SCPSYS>;

        clock-names = "main";



        cros_ec {

        cros-ec-rpmsg {

            compatible = "google,cros-ec-rpmsg";

            mediatek,rpmsg-name = "cros-ec-rpmsg";

        };

    };



  - |

    scp@10500000 {

        compatible = "mediatek,mt8195-scp-dual";

        reg = <0x10720000 0xe0000>,

              <0x10700000 0x8000>;

        reg-names = "cfg", "l1tcm";



        #address-cells = <1>;

        #size-cells = <1>;

        ranges = <0 0x10500000 0x100000>;



        scp@0 {

            compatible = "mediatek,scp-core";

            reg = <0x0 0xa0000>;

            reg-names = "sram";



            cros-ec-rpmsg {

                compatible = "google,cros-ec-rpmsg";

                mediatek,rpmsg-name = "cros-ec-rpmsg";

            };

        };



        scp@a0000 {

            compatible = "mediatek,scp-core";

            reg = <0xa0000 0x20000>;

            reg-names = "sram";



            cros-ec-rpmsg {

                compatible = "google,cros-ec-rpmsg";

                mediatek,rpmsg-name = "cros-ec-rpmsg";

            };

        };

    };

Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml

+2 −18
Original line number Diff line number Diff line
@@ -66,7 +66,9 @@ allOf: 
              - qcom,msm8953-adsp-pil

              - qcom,msm8974-adsp-pil

              - qcom,msm8996-adsp-pil

              - qcom,msm8996-slpi-pil

              - qcom,msm8998-adsp-pas

              - qcom,msm8998-slpi-pas

              - qcom,sdm845-adsp-pas

              - qcom,sdm845-cdsp-pas

              - qcom,sdm845-slpi-pas
@@ -79,24 +81,6 @@ allOf: 
          items:

            - const: xo



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,msm8996-slpi-pil

              - qcom,msm8998-slpi-pas

    then:

      properties:

        clocks:

          items:

            - description: XO clock

            - description: AGGRE2 clock

        clock-names:

          items:

            - const: xo

            - const: aggre2



  - if:

      properties:

        compatible:

Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml

+0 −2
Original line number Diff line number Diff line
@@ -220,7 +220,6 @@ allOf: 
            - description: GCC MSS GPLL0 clock

            - description: GCC MSS SNOC_AXI clock

            - description: GCC MSS MNOC_AXI clock

            - description: RPM PNOC clock

            - description: RPM QDSS clock

        clock-names:

          items:
@@ -231,7 +230,6 @@ allOf: 
            - const: gpll0_mss

            - const: snoc_axi

            - const: mnoc_axi

            - const: pnoc

            - const: qdss

        glink-edge: false

      required:

Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml

+56 −25
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ description: 
properties:

  compatible:

    enum:

      - qcom,sc7180-adsp-pas

      - qcom,sc7180-mpss-pas

      - qcom,sc7280-mpss-pas
@@ -30,26 +31,6 @@ properties: 
    items:

      - const: xo



  interrupts:

    minItems: 6



  interrupt-names:

    minItems: 6



  power-domains:

    minItems: 2

    items:

      - description: CX power domain

      - description: MX power domain

      - description: MSS power domain



  power-domain-names:

    minItems: 2

    items:

      - const: cx

      - const: mx

      - const: mss



  memory-region:

    maxItems: 1

    description: Reference to the reserved-memory for the Hexagon core
@@ -71,6 +52,40 @@ required: 


allOf:

  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#

  - if:

      properties:

        compatible:

          enum:

            - qcom,sc7180-adsp-pas

    then:

      properties:

        interrupts:

          maxItems: 5

        interrupt-names:

          maxItems: 5

    else:

      properties:

        interrupts:

          minItems: 6

        interrupt-names:

          minItems: 6



  - if:

      properties:

        compatible:

          enum:

            - qcom,sc7180-adsp-pas

    then:

      properties:

        power-domains:

          items:

            - description: LCX power domain

            - description: LMX power domain

        power-domain-names:

          items:

            - const: lcx

            - const: lmx



  - if:

      properties:

        compatible:
@@ -79,15 +94,31 @@ allOf: 
    then:

      properties:

        power-domains:

          minItems: 3

          items:

            - description: CX power domain

            - description: MX power domain

            - description: MSS power domain

        power-domain-names:

          minItems: 3

    else:

          items:

            - const: cx

            - const: mx

            - const: mss



  - if:

      properties:

        compatible:

          enum:

            - qcom,sc7280-mpss-pas

    then:

      properties:

        power-domains:

          maxItems: 2

          items:

            - description: CX power domain

            - description: MX power domain

        power-domain-names:

          maxItems: 2

          items:

            - const: cx

            - const: mx



unevaluatedProperties: false

Documentation/devicetree/bindings/remoteproc/qcom,sm6375-pas.yaml

0 → 100644
+145 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/remoteproc/qcom,sm6375-pas.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm SM6375 Peripheral Authentication Service



maintainers:

  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>



description:

  Qualcomm SM6375 SoC Peripheral Authentication Service loads and boots

  firmware on the Qualcomm DSP Hexagon cores.



properties:

  compatible:

    enum:

      - qcom,sm6375-adsp-pas

      - qcom,sm6375-cdsp-pas

      - qcom,sm6375-mpss-pas



  reg:

    maxItems: 1



  clocks:

    items:

      - description: XO clock



  clock-names:

    items:

      - const: xo



  memory-region:

    maxItems: 1

    description: Reference to the reserved-memory for the Hexagon core



  firmware-name:

    $ref: /schemas/types.yaml#/definitions/string

    description: Firmware name for the Hexagon core



  smd-edge: false



required:

  - compatible

  - reg



allOf:

  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#

  - if:

      properties:

        compatible:

          enum:

            - qcom,sm6375-adsp-pas

            - qcom,sm6375-cdsp-pas

    then:

      properties:

        interrupts:

          maxItems: 5

        interrupt-names:

          maxItems: 5

    else:

      properties:

        interrupts:

          minItems: 6

        interrupt-names:

          minItems: 6



  - if:

      properties:

        compatible:

          enum:

            - qcom,sm6375-adsp-pas

    then:

      properties:

        power-domains:

          items:

            - description: LCX power domain

            - description: LMX power domain

        power-domain-names:

          items:

            - const: lcx

            - const: lmx



  - if:

      properties:

        compatible:

          enum:

            - qcom,sm6375-cdsp-pas

            - qcom,sm6375-mpss-pas

    then:

      properties:

        power-domains:

          items:

            - description: CX power domain

        power-domain-names:

          items:

            - const: cx



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/qcom,rpmcc.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/mailbox/qcom-ipcc.h>

    #include <dt-bindings/power/qcom-rpmpd.h>



    remoteproc_adsp: remoteproc@a400000 {

        compatible = "qcom,sm6375-adsp-pas";

        reg = <0x0a400000 0x100>;



        interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,

                              <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,

                              <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,

                              <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,

                              <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;

        interrupt-names = "wdog", "fatal", "ready",

                          "handover", "stop-ack";



        clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;

        clock-names = "xo";



        power-domains = <&rpmpd SM6375_VDD_LPI_CX>,

                        <&rpmpd SM6375_VDD_LPI_MX>;

        power-domain-names = "lcx", "lmx";



        memory-region = <&pil_adsp_mem>;



        qcom,smem-states = <&smp2p_adsp_out 0>;

        qcom,smem-state-names = "stop";



        glink-edge {

            interrupts-extended = <&ipcc IPCC_CLIENT_LPASS

                                         IPCC_MPROC_SIGNAL_GLINK_QMP

                                         IRQ_TYPE_EDGE_RISING>;

            mboxes = <&ipcc IPCC_CLIENT_LPASS

                            IPCC_MPROC_SIGNAL_GLINK_QMP>;



            label = "lpass";

            qcom,remote-pid = <2>;



            /* ... */

        };

    };