Commit b9365f41 authored by Antonino Maniscalco's avatar Antonino Maniscalco Committed by Rob Clark
Browse files

drm/msm: Add a `preempt_record_size` field 



Adds a field to `adreno_info` to store the GPU specific preempt record
size.

Reviewed-by: default avatarAkhil P Oommen <quic_akhilpo@quicinc.com>
Tested-by: default avatarRob Clark <robdclark@gmail.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8450-HDK
Signed-off-by: default avatarAntonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/618015/


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 3241504e

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

+4 −0
Original line number Diff line number Diff line
@@ -1324,6 +1324,7 @@ static const struct adreno_info a7xx_gpus[] = { 
			.gmu_cgc_mode = 0x00020000,

		},

		.address_space_size = SZ_16G,

		.preempt_record_size = 2860 * SZ_1K,

	}, {

		.chip_ids = ADRENO_CHIP_IDS(0x43050a01), /* "C510v2" */

		.family = ADRENO_7XX_GEN2,
@@ -1344,6 +1345,7 @@ static const struct adreno_info a7xx_gpus[] = { 
			.gmu_cgc_mode = 0x00020202,

		},

		.address_space_size = SZ_16G,

		.preempt_record_size = 4192 * SZ_1K,

	}, {

		.chip_ids = ADRENO_CHIP_IDS(0x43050c01), /* "C512v2" */

		.family = ADRENO_7XX_GEN2,
@@ -1363,6 +1365,7 @@ static const struct adreno_info a7xx_gpus[] = { 
			.gmu_cgc_mode = 0x00020202,

		},

		.address_space_size = SZ_256G,

		.preempt_record_size = 4192 * SZ_1K,

	}, {

		.chip_ids = ADRENO_CHIP_IDS(0x43051401), /* "C520v2" */

		.family = ADRENO_7XX_GEN3,
@@ -1382,6 +1385,7 @@ static const struct adreno_info a7xx_gpus[] = { 
			.gmu_cgc_mode = 0x00020202,

		},

		.address_space_size = SZ_16G,

		.preempt_record_size = 3572 * SZ_1K,

	}

};

DECLARE_ADRENO_GPULIST(a7xx);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

+1 −0
Original line number Diff line number Diff line
@@ -111,6 +111,7 @@ struct adreno_info { 
	 * {SHRT_MAX, 0} sentinal.

	 */

	struct adreno_speedbin *speedbins;

	u64 preempt_record_size;

};



#define ADRENO_CHIP_IDS(tbl...) (uint32_t[]) { tbl, 0 }