Commit b93d8b1c authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Ulf Hansson
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dt-bindings: mmc: renesas,sdhi: Document RZ/T2H and RZ/N2H support



Add SDHI bindings for the Renesas RZ/T2H (a.k.a R9A09G077) and RZ/N2H
(a.k.a R9A09G087) SoCs. Use `renesas,sdhi-r9a09g057` as a fallback since
the SD/MMC block on these SoCs is identical to the one on RZ/V2H(P),
allowing reuse of the existing driver without modifications.

Update the binding schema to reflect differences: unlike RZ/V2H(P),
RZ/T2H and RZ/N2H do not require the `resets` property and use only a
two clocks instead of four.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250617164914.158091-1-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 15b8c45f
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+53 −32
Original line number Diff line number Diff line
@@ -72,6 +72,8 @@ properties:
          - enum:
              - renesas,sdhi-r9a09g047 # RZ/G3E
              - renesas,sdhi-r9a09g056 # RZ/V2N
              - renesas,sdhi-r9a09g077 # RZ/T2H
              - renesas,sdhi-r9a09g087 # RZ/N2H
          - const: renesas,sdhi-r9a09g057 # RZ/V2H(P)

  reg:
@@ -125,6 +127,25 @@ allOf:
  - $ref: mmc-controller.yaml

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,sdhi-r9a09g077
              - renesas,sdhi-r9a09g087
    then:
      properties:
        resets: false
        clocks:
          items:
            - description: ACLK, IMCLK, SDHI channel bus and main clocks.
            - description: CLK_HS, SDHI channel High speed clock.
        clock-names:
          items:
            - const: aclk
            - const: clkh
    else:
      if:
        properties:
          compatible:
            contains: